Top 10 predictions for the wireless industry
Originally from EE Times -- and followed by our reader comments They are as follows: 1. High-speed downlink packet acc…
Originally from EE Times -- and followed by our reader comments They are as follows: 1. High-speed downlink packet acc…
Chalk this one up to wild unsubstantiated rumor, but Digitimes is reporting that Intel may hold off on launching its 45…
The fury has really been unleashed over at AMD , as the cats in 2nd place take aim at the pocketbooks lowdown, dirty ov…
A Verification engineer claiming mastery in Gate-level simulation is coming for an Interview. Interviewer: Welcome …
There is a common phrase used to describe some job candidates - "I don't know whether he has 10 years of exper…
Every significant project that you undertake will transform every team member by the end of that project. The right pro…
India and China are playing a major role in shaping the digital convergence, a much-hyped concept that is nevertheless …
STMicroelectronics NV (Geneva, Switzerland) announced it has manufactured its first functional devices using the CMOS 4…
Analog and Digital Circuits for Electronic Control System Applications: Using the TI MSP430 Microcontroller by Jerry L…
Analysis and Design of Analog Integrated Circuits (4th Edition) by Paul R. Gray (Author), Paul J. Hurst (Author), Steph…
The Art of Analog Layout by Alan Hastings (Author), Roy Alan Hastings (Author) Book Info (Pearson Educatio…
Analog Circuit Design: Art, Science and Personalities (EDN Series for Design Engineers) by Jim Williams (Editor) &q…
Analog Circuits Cookbook by Ian Hickman (Author) "negative components may not be called for every day, bu…
ASIC and FPGA Verification: A Guide to Component Modeling (Systems on Silicon) by Richard Munden "As large and co…
L-01: Computer System Architecture, pdf , ppt [09/05/07] 1-Intro: Introduction to Pin, pdf [09/05/07] L-02: Influen…
Out-of-Order SMIPS Processor Using Tomasulo's Algorithm Cliff Frey and Vicky Liu Final presentation [ PDF , PDF-4UP…
Source EE Times Intel, Sony, Toshiba and Qualcomm are the stars -- or winners -- in iSuppli Corp.'s projected IC ra…
YelloMosquito delivers Qingbar Gp300: the wireless HMD Courtest - Engadget Although you may not be familiar with Yell…
via EE Times Semiconductor News on 11/22/07 Three Intel researchers Robert Chau, Kaizad Mistry and Tahir Ghani, who …
Your next co-op job is with the Independent Eagle-Eyed Elective, a consulting firm that performs code reviews for other…
BY READING "The Digital Electronics Blog", YOU AGREE TO BE BOUND BY ALL THE TERMS AND CONDITIONS. If you do n…
Message from BSNL Customer care.. Hello Sir/Madam, I would like to add something more to about IPTV Service Blog. We ar…
The following graph plots the voltage transfer characteristic for a device with one input and one output. Can this devi…
The behavior of a 1-input, 1-output device is measured by hooking a voltage source to its input and measuring the volta…
What are the two key concepts in the simulation semantics of VHDL and how does each concept help VHDL simulation produc…
Over the weekend Intel launched its long-awaited new 'Penryn' line of power-efficient microprocessors , designe…
The organization Scholastic Lecture Expert Productivity Testers (SLEPT), has defined a standardized algorithm to compre…
For each of the code fragments, answer whether the code is legal VHDL. If the code is legal VHDL, answer whether it is…
For the following question, you only need to give the relevant VHDL code fragment (i.e. process that drives the flop). …
Assume a clock-gating scheme for turning off the clock in certain situations: 60% of the time, the main circuit has va…
The average performance of products in your market segment triples every 36 months. Your design engineers have proposed…
The new vice president of your company has set up a contest for ideas to reduce leakage power in the next generation of…
Black box testing not based on any knowledge of internal design or code. Tests are based on requirements and functional…
Boolean logic Minimization State machine design Synchronous circuit timing, races, testability Pipelines and hazards…
This is a general checklist for freshers to take on the job hunting adventure... CMOS gates, complex gates, Latch and …
A 1.2GHz chip has scan chains of length 30,000 bits, 20,000 bits, 24,000 bits, 25,000 bits, and two of 12,000 bits. 500…
The VLSI gurus at your company have come up with a way to decrease the average rise and fall time (0-to-1 and 1-to-0 tr…
If you were to compare a typical digital circuit from 5 years ago with a typical digital circuit today, would you find …
The new vice president of your company has set up a contest for ideas to reduce leakage power in the next generation of…
As temperature increases, does the power consumed by a typical combinational circuit increase, stay the same, or decrea…
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