Interview question - Clock and Voltage

Interview question - Clock and Voltage

Increasing clock speed without increasing power... The following are given: You need to increase the clock speed of a…

Interview question - Power & Area

Interview question - Power & Area

One day you are strolling the hallways in search of inspiration, when you bump into a person from the marketing departm…

Interview question

Interview question

If you were to compare a typical digital circuit from 5 years ago with a typical digital circuit today, would you find …

Basic Timing - Interview question

Assume that the timing diagram shows the limits of the allowed times (either minimum or maximum). For each of the terms…

Interview Questions

Interview Questions

If you have to write your own code (i.e. you do not have a library of memory components or a special component generati…

Delay Modelling and Coding Guidelines

Delay Modelling and Coding Guidelines

In digital logic design, there are different types of delay modeling. Some of the commonly used delay modeling techniqu…

New Year's Wishes

New Year's Wishes

May you get a clean bill of health from your dentist, your cardiologist, your gastro-enterologist, your urologist, your…

Future Trends!!

Future Trends!!

How long do you think DVDs have around? 20 years? 10 years? Actually, they have only been around for about seven years,…

Gate Level Simulation, Part - II

Gate Level Simulation, Part - II

Gate level simulation is used in the late design phase to increase the level of confidence about a design implementat…

Glossary of EDA Terms

Glossary of EDA Terms

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Verilog rules that can save your breath !

Verilog rules that can save your breath !

This article contains some thoughts of mine about how and engineer should write Verilog code for Synthesis, general rul…

Synthesis

Synthesis

Logic synthesis is a process by which an abstract form of desired circuit behavior, typically register transfer level (…

Comprehensive Verilog Tutorials - Introduction

Comprehensive Verilog Tutorials - Introduction

The history of the Verilog HDL goes back to the 1980s, when Gateway Design Automation developed Verilog-XL logic simula…

Comprehensive Verilog Tutorials - Welcome

Comprehensive Verilog Tutorials - Welcome

This is an Introductory & Comprehensive Verilog Course, which covers.. Modeling Designs for Digital Simulation. Mod…

Sponsors

Sponsors

Be a sponsor & Support this Blog Some of our Proud Sponsors: VLSIChipDesign Checkout how much a Text-Link is worth …

Added Features!

Added Features!

After much awaited delay due to developments on the blogger in beta, i m happy to announce that i have successfully con…

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