Is Intel prepping up for 450mm wafer sizes?

Is Intel prepping up for 450mm wafer sizes?

Is Intel preparing to push the issue with regard to its desire to move to 450-mm wafer sizes? One analyst thinks so . W…

Intel buys Infineon wireless

Intel buys Infineon wireless

As per the management email sent to Infineon employees this morning, Infineon and Intel have signed the contracts relat…

High-Level Synthesis Blue Book

High-Level Synthesis Blue Book

The High Level Synthesis Blue Book is a comprehensive guide for designing hardware using C++. It is targeted to RTL…

High-def iPhone 4

This new model available in black or white from June 24 has an unchanged pricing at $199 for the 16GB model and $299 fo…

SNUG India 2010 Registrations Open

SNUG India 2010 Registrations Open

The conference schedule and the registration links can be found here . With a program that is focused on helping you de…

Clock network design

Clock network design

In this blog post, we will discuss some of the challenges and techniques involved in designing a clock network for a ve…

IR drop driven placement

IR drop driven placement

The objective here is to explore placement techniques which can lead to reduction in IR drop. One way to do this is to …

Clock skew variation estimation

Clock skew variation estimation

Clock skew variation estimation is an important topic in the design and analysis of high-performance digital circuits. …

Impact of dummy fill on timing

Impact of dummy fill on timing

How can you quantify the impact of dummy fill on post-layout timing?  Dummy fill can be inserted into a layout using SO…

Investigation on timing analysis inaccuracies

Investigation on timing analysis inaccuracies

Timing analysis inaccuracies due to crosstalk, multiple gate input switching, supply voltage variation, temperature, ma…

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