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World's first Carbon Nanotube based Computer


A Carbon Nanotube with its unique properties are a big breakthrough for electronics. Due to their thermal conductivity, mechanical and electrical properties, they find applications as additives to various structural materials. A team of Stanford engineers have taken this and built a basic computer harnessing the huge energy conservation capabilities and thereby promising to extend 'Moore's Law' for years to come.

Intel co-founder Gordon Moore's 1965 prediction that computer circuitry will keep getting smaller and cheaper to produce has held up. But as integrated circuits (ICs) keep getting more densely populated with transistors, the large amounts of heat they dissipate have prompted concerns over whether silicon can be used for many more generations of transistor shrinkage.



"People have been talking about a new era of carbon nanotube electronics moving beyond silicon. But there have been few demonstrations of complete digital systems using this exciting technology. Here is the proof," Mitra said in a statement.






Mihail Roco, senior advisor for Nanotechnology at the National Science Foundation, called the Stanford work "an important, scientific breakthrough". The research was led by Stanford professors Subhasish Mitra and H.S. Philip Wong.

Non-Synthesizable VHDL Code


RTL Synthesis is done by matching high level code against templates or patterns. It is important to use idioms that your synthesis tool recognizes. If you aren’t careful, you could write code that has the same behavior as one of the idioms, but which results in inefficient or incorrect hardware.





Most synthesis tools agree on a large set of idioms, and will reliably generate hardware for these idioms. This post is based on the idioms that Synopsys, Xilinx, Altera, and Mentor Graphics are all able to synthesize. We consider combinational loops to be unsynthesizable. Although it is obviously possible to build a circuit with a combinational loop, in most cases the behaviour of such a circuit is undefined.

Initial Values
Initial values on signals (UNSYNTHESIZABLE)
signal bad_signal : std_logic := ’0’;
Reason: In most implementation technologies, when a circuit powers up, the values on signals are completely random. Some FPGAs are an exception to this. For some FPGAs, when a chip is powered up, all flip flops will be ’0’. For other FPGAs, the initial values can be programmed.

Wait For
Wait for length of time (UNSYNTHESIZABLE)
wait for 10 ns;
Reason: Delays through circuits are dependent upon both the circuit and its operating environment, particularly supply voltage and temperature.

Different Wait Conditions
wait statements with different conditions in a process (UNSYNTHESIZABLE)
-- different clock signals
process
begin
wait until rising_edge(clk1);
x <= a;
wait until rising_edge(clk2);
x <= a;
end process; 

-- different clock edges
process
begin
wait until rising_edge(clk);
x <= a;
wait until falling_edge(clk);
x <= a;
end process; 

Reason: Processes with multiple wait statements are turned into finite state machines. The wait statements denote transitions between states. The target signals in the process are outputs of flip flops. Using different wait conditions would require the flip flops to use different clock signals at different times. Multiple clock signals for a single flip flop would be difficult to synthesize, inefficient to build, and fragile to operate.

Multiple “if rising edge”s in Same Process
Multiple if rising edge statements in a process (UNSYNTHESIZABLE)
process (clk)
begin
if rising_edge(clk) then
q0 <= d0;
end if;
if rising_edge(clk) then
q1 <= d1;
end if;
end process;
Reason: The idioms for synthesis tools generally expect just a single if rising edge statement in each process. The simpler the VHDL code is, the easier it is to synthesize hardware. Programmers of synthesis tools make idiomatic restrictions to make their jobs simpler.

“if rising edge” and “wait” in Same Process
An if rising edge statement and a wait statement in the same process (UNSYNTHESIZABLE)
process (clk)
begin
if rising_edge(clk) then
q0 <= d0;
end if;
wait until rising_edge(clk);
q0 <= d1;
end process;
Reason: The idioms for synthesis tools generally expect just a single type of flop-generating statement
in each process.

“if rising edge” with “else” Clause
The if statement has a rising edge condition and an else clause (UNSYNTHESIZABLE).
process (clk)
begin
if rising_edge(clk) then
q0 <= d0;
else
q0 <= d1;
end if;
end process;
Reason: Generally, an if-then-else statement synthesizes to a multiplexer. The condition that is tested in the if-then-else becomes the select signal for the multiplexer. In an if rising edge with else, the select signal would need to detect a rising edge on clk, which isn’t feasible to synthesize.

“if rising edge” Inside a “for” Loop
An if rising edge statement in a for-loop (UNSYNTHESIZABLE-Synopsys)
process (clk) begin
for i in 0 to 7 loop
if rising_edge(clk) then
q(i) <= d;
end if;
end loop;
end process;
Reason: just an idiom of the synthesis tool.
Some loop statements are synthesizable. For-loops in general are described in the VHDL cookbook by Ashenden. For the curious reader, the above code is an 8-bit serial-to-parallel converter. The signal d is the serial data and q is the parallel data. On each clock cycle, d is copied into one of the bits of q.

For the synthesizable alternatives, please discuss/leave comments below.

We are now blog.digitalelectronics.co.in


We have a new look and feel to the articles that you loved most :-)



Your favorite blog, digitalelectronics.blogspot.com is now blog.digitalelectronics.co.in. Those who have already visited this blog since yesterday would have noticed a much simpler clutter free appearance while keeping the legacy features. We’ve refined the design and encapsulated the information accumulated over the years into an easily digestible and navigatable website. I am quite proud of it. In the coming months, i hope to improving this blog further so that it best serves you, the blog members.
Thank you.

Links & Resources (Link your website/blog)


This is an archive of the Links and Resources from the electronics web community submitted here so far. Please add your own link using the form below, but be advised that non related (spam) links will not be entertained.






A................................................................................................................
ASIC-System On Chip (SoC)-VLSI Design
.
B................................................................................................................
.
C................................................................................................................
CAD 4 VLSI
CAD and VLSI
Chip Design Made Easy
Coaching Excellence in IC Design Teams
Computer Harware links
Consciousness as the theory of everything
Cool Verification
.
D................................................................................................................
Daniel Nenni
DeepChip
Design For Testability Blog
DFT Digest
Digital IC Design
.
E................................................................................................................
e Verification
EET Design
EET Semi
EEWeb Electronics Forum - Electrical Engineering Community
Embedded System Design
Eric Schorn's Processors for People Blog
.
.
F................................................................................................................
Fahrvergnugen
FPGA and DSP from scratch
FPGA Computing
Future of Design
.
.
G................................................................................................................
.
.
H................................................................................................................
Hardware Description and Verification Language
harry ... the ASIC guy
hdlsnippets - Releveant and accurate HDL snippets in verilog, system verilog and VHDL.
.
.
I................................................................................................................
Industry Insights
IntelligentDV -Blog
.
.
J................................................................................................................
John Cooley's DeepChip.com
John's Semi-Blog
JTAG
.
.
K................................................................................................................
Kiran Bulusu's Blog
.
L................................................................................................................
Linley Chips In
Listening Post
.
.
M................................................................................................................
Magic Blue Smoke
My Electronics Blog
..
N................................................................................................................
Nadav's Tech Adventures
Nanotech
Ninja ASIC Verification
.
.
O................................................................................................................
Oh, one more thing
Olivier Coudert's Blog
On Verification: A Software-to-Silicon Verification
.
P................................................................................................................
Pallab's Place
Practical Chip Design
.
.
Q................................................................................................................
.
.
R................................................................................................................
Reconfigurable Computing
RocketBlog - a discussion about all things related...
.
S................................................................................................................
Semiconductor Glossary BLOG
skmurphy
Specman Verification
Studying and practicing Electronics
SysWip- For free open source SystemVerilog verification IPs.
.
T................................................................................................................
Taking the Measure
Tao of ASICs
TestBench
The Eyes Have It
The Inquirer
The Solar Cell Corner
The Standards Game
The Tao Of ASICs
The Ultimate Hitchhiker's Guide to SV- VMM
The Xuropean
Think Verification - Tips Insights on ASIC Verification
Tips for HVL and HDL users with special emphasis on...
Travelling On The Silicon Road
.
U................................................................................................................
.
V................................................................................................................
Verification Martial Arts
Verification Vertigo
VerificationOnWeb (VoW)
verifyurdesign
VeriGood
Verilab
Verilab Blog
VHDL Guru - Coding, Tips & Tricks (New)
VLSI core
VLSI FAQ
VLSI int Q's from Google
VLSI Interview Questions
VLSI The Chip Insider
VLSI, VLSI CAD, and Programming WareHouse
VLSIhomepage
.
W................................................................................................................
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X................................................................................................................
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Y................................................................................................................
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Z................................................................................................................

Acer Liquid C1: The Intel-powered Android 4.0 Phone


Intel and Acer have announced the Acer Liquid C1, an Android 4.0 smartphone at an event in Thailand.
Read more at: http://ibnlive.in.com/photogallery/12481.html?from=HP&utm_source=ref_article

Intel integrated LTE Modem + AP only in 2014


According to EETimes Intel is already shipping data only LTE modems to customers and data-and-voice multimode modem would ship during 2013.
Intel is significantly lagging in the integrated modem and processor space that puts Intel way behind Qualcomm Inc., which already offers integrated LTE capability in its Snapdragon line of application processors. Intel's wireless capabilities are largely credited to the acquisition of wireless business unit of Infineon Technologies AG (Munich, Germany). This very team is known for its solid engineering capabilities while being cost effective and cost competitive.






Quick Introduction to LTE-Advanced


3G and 4G Wireless Blog: Quick Introduction to LTE-Advanced is an article written by Zahid Ghadialy where he explains LTE-A without going in technical details. This also includes the state of market on who is doing what.

LTE QoS Concepts & Architecture - Free Video Tutorials


Topics Covered: 1.What is LTE QoS? 2.QoS Tags 3.Bearer 4.QoS Management 5.PCRF Lecturered by: Yair Shapira

Credit Suisse rates Intel Corp. stocks "Outperform" with a $32 price target


Read the full summary of Intel's Q4 results here and analyst estimates here. on Google Finance!

Nokia Lumia 900 is a Scrumptious Treat!


Any Nokia spy who has been sniffing around to get a foretaste of Nokia Lumia 900 would’ve had their plate full with all kinds of rumors. And now with the phone launched,and the rumor mills halted, we finally get to sink our teeth into the scrumptious device.


A little heads-up: The first bite is lip smacking!

Largest Ever
With a 4.3-inch display Lumia 900 is the largest smart phone ever conjured up by Nokia, often touted as Windows Phone’s flagship model. While the size has been upped, the design is clearly an evolution of Nokia Lumia 800, which in turn was an offshoot of Nokia N9 Meego. So if you ever get your hands on one of these babies, what you’ll have is a device much bigger in size than ever before with features that haven’t really been explored in the past.

Dazzling
Lumia 900’s massive screen is AMOLED and has a resolution of 800 x 480 pixels – which again is quite decent indeed. The text and icons on your phone will look sharper but it wouldn’t be excessively sharp on the display. Nokia ClearBack Display allows the screen brightness to modify itself in synchrony with the surrounding light making it more than viable to be used in any condition. The display is extremely bright and makes browsing or texting a dazzling experience.

Shade, Shape and Stone
Nokia Lumia 900 is available in three – black, cyan and white – colors, which adds to its aesthetic allure and diversity. And despite its monstrous size Nokia’s latest device is actually pleasing to the hand owing to its weight and shape. The cell phone weighs 160g – again decent, for its class and size – and measures 127.8 x 68.5 x 11.5 mm. In fact, its width is actually less than Lumia 800, hence adding to its user-friendliness and overall comfort.

Tweak or Two
There are a few variations from the Lumia 800, especially at the top of the Lumia 900. There is no plastic cover for the USB port, and change of access route for the microSIM port. There is also a slight change in the side function buttons; even so, their accessibility is as smooth as that of its predecessor.

Owing to the adjustment of the screen, there is an obvious layout reshuffle; most notably in the touch-sensitive navigation buttons. Plus a front-facing camera has been added to the design to facilitate video calling. And there is another 8-megapixel camera on the rear side which has dual-flash and also Carl Zeiss optics. The camera has the potential of conjuring up 3264 x 2448 pixel images, and has a 3x digital zoom to further add to the array of mouthwatering prospects.
The main menu is where Lumia 900 has sprung the biggest surprise: the user can now switch the front and rear cameras by a button’s tap! Not to forget the front camera giving 1280 x 720 pixel images via a 1-megapixel CCD.

Tango Time
Lumia 900 is the first handset to have Windows Phone Tango update. It might be bringing as many updates as Mango, but it still does speak volumes about the direction of the platform. And while Tango’s most significant new feature might be irrelevant to the Lumia 900, video attachment support in texts among other background tasks definitely add to the cell phone’s flavor.

Epilogue
Despite the bigger screen, Nokia Lumia 900 is incredibly user-friendly and sleek. The brightness of the screen is another highlight in this amazing device, which has been aptly coupled with a robust battery – much to the intrigue of a multitude of Nokia spies and cell phone scouts. If what you want is a Windows phone (one that accompanies a large screen) then look no further.

Author Bio
Jane Andrew writes about Nokia spy software and <a href="http://www.mobistealth.com/keylogger">keylogger</a> technology. She provides tips and news about cell phone and Nokia phone security. You can also follow her on Twitter @janeandrew01 to get the latest tips about nokia phone security and privacy.

Lava XOLO X900 - AnandTech Review


Reader's in India, did you have a chance to try out this phone? would you buy/recommend it?

Lava XOLO X900 - World's first Intel phone


Discover what makes XOLO X900 with Intel Inside® the benchmark on speed and performance. Please head to the site directly by hitting the title.

Intel Mobile Comm's is looking for a Senior Verif Engineer


This opening is in Bangalore, India and the company is looking forward to close it at the earliest Job Description: 1. About 5-7 years of experience in functional verification with at least 3-4 years in HVL's like E language/specman and System Verilog. 2. Good experience at both module and sub-system/SOC level verification 3. Good knowledge of Verilog/VHDL 4. Good knowledge of UVM/eRM methodology 5. Should have developed complete test bench architecture, designing and coding of test bench components like UVCs/eVCs including checkers, monitors, scoreboards, BFMs 6. Should have architected the test plan including functional coverage and driven functional verification closure of complex DUTs 7. Expertise in sequences and sequence libraries 8. Working knowledge of register package model, regressions tools like eManager and perl scripting. 9. Should have working knowledge of ARM based processors and AHB Desirable skill set: 1. Exposure to other object oriented verification methodologies like VMM/OVM/UVM and system Verilog. 2. Exposure to C++, TLM and Co-verification Role: 1. Ownership and leadership of verification activity . 2. Good coordination skills to work in a flexible manner with multi-skilled teams and schedule-critical projects Technical interaction with concept, system, program and design teams that are geographically distributed If you are interested please contact using this link

Heinrich Rudolf Hertz's 155th Birthday


Cover Letter's, Resume's and Jobs


Cover letter gets the recipient to read your resume, the resume gets you an interview and the interview gets you the job offer.

iOS 5: Complete list of 200+ Features






If you are an Apple fan like i am, own an IOS device and are curious to know what the full list of features on the new IOS 5 are, then follow the hyperlink!

R.I.P: Steve Jobs (February 24, 1955 – October 5, 2011)


You defined how products should be made and brought to the masses. You re-iterated that successful technologies are which deliver and refine user experience.

IBM, Intel Start $4.4 Billion Chip Venture in New York


Kudos to IBM, Intel and New York state for putting together a deal that will make upstate New York the center of R&D work for chip production on 450-mm and the development of 22- and 14-nm process technology for IBM's so-called "fab club," the Common Platform Alliance. According to New York Governor Andrew Cuomo, the deal, which involves $4.4 billion of investment, will create about 4,400 jobs and help the region retain another 2,500. Many of those jobs might just have easily have ended up in Taiwan, South Korea, Abu Dhabi or elsewhere. The deal is a coup for New York, which is presumably offering the companies tax breaks or other incentives to locate the projects there. (New York state itself is kicking in some $400 million over five years, but Gov. Cuomo made it clear in a statement announcing the projects that no private company will receive any state funds as part of the agreement.) Albany, already home to the semiconductor research consortium Sematech, the Albany Nanotech Complex and, soon, the Global 450 Consortium, increasingly appears to have surpassed the Silicon Valley as the place to be for semiconductor industry R&D. [More]

Intel Medfield Atom based Android Tablet in 2012


Intel is one of few companies that was given access to the Google Android Honeycomb source code–which Google has to this date not made public yet because the company is still optimizing Honeycomb for future phone releases–and it took Intel a few weeks to re-compile the code to make it compatible for its x86 architecture–the code was originally written for ARM chipsets. "It is HOT" [More here]