Showing posts with label Cheap. Show all posts
Showing posts with label Cheap. Show all posts

How to Inexpensively Design an ASIC in 5 Weeks


If you have ever designed a standard cell ASIC from scratch, you probably still have the scars to show for it. Designing a standard cell ASIC is not for the weak-hearted. A new generation of ASIC, (dubbed the NEW ASIC), is gaining momentum as an alternative to both standard cell ASIC and FPGA design which is explained in this paper. This new generation of ASIC combines the fast turnaround, low up-front development costs and simple design flow benefits that are normally associated with FPGAs, with the low unit power consumption and cost approaching that of a standard cell ASIC.