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Many embedded system-on-a-chip (SoC) designs make use of multiple processors, but do so in an application-specific or "loosely coupled" manner. Until recently, SoC design options for software-friendly multiprocessing were severely limited. But with the advent of SoC design components such as the MIPS32 1004K Coherent Processing System, on-chip multiprocessing under a single operating system has become a real design option. This paper explores a number of ways that multiprocessing can be exploited to achieve high SoC performance, especially for designs with parallel operations, high rates of I/O DMA traffic, or that are being re-designed to address converging applications.
Multiple microprocessor cores which communicate via an on-chip network are increasingly found in integrated circuit designs. These systems offer unprecedented levels of performance, while still remaining highly programmable and consuming modest amounts of power. In addition to high-end CPUs, they are highly suitable for high-performance embedded applications including multimedia, digital signal processing and networking. Dr. Steve Guccione of Cmpware, Inc., presented an invited paper at ERSA-2005 on this topic. His paper and slides are on-line as well as a free development kit at: Cmpware