Showing posts with label Process. Show all posts
Showing posts with label Process. Show all posts

Restrictive Design Rules and Their Impact on 22nm Design and Physical Verification


Process variability is posing considerable challenge to the capability of lithography and manufacturing techniques, and thus impacts both performance and yield of advanced node chips. To ensure the manufacturability and performance of chips at 22nm, one approach the industry is considering is restrictive design&mash;limiting the type and placement of features used in designs. Gridding of critical layers significantly reduces the total physical design space available and makes restrictive design possible. This paper examines the basics of gridding, the requirements for restrictive gridded design, and the automated methods for accurate checking of Restrictive Design Rules (RDRs). Resolving the debug challenges associated with the implementation of checking restrictive design and grid rules is also discussed.

Making More Solar Cells from Silicon


A new manufacturing process could cut the cost of making crystalline silicon wafers for solar cells by 80 percent. The process is being developed by Lexington, MA-based 1366 Technologies, which this week showed off the first solar cells made this way. The technology is key to the company's plan to make solar power cheaper than the electricity generated from coal within 10 years. Follow the links for more info.