Showing posts with label Processors. Show all posts
Showing posts with label Processors. Show all posts

Memory Management Technique Speeds Apps By 20%


A paper (PDF) to be presented later this month at the IEEE International Parallel and Distributed Processing Symposium in Atlanta describes a new approach to memory management that allows software applications to run up to 20% faster on multicore processors. Yan Solihin, associate professor of electrical and computer engineering at NCSU and co-author of the paper, says that using the technique is just a matter of linking to a library in a program that makes heavy use of memory allocation. The technique could be especially valuable for programs that are difficult to parallelize, such as word processors and Web browsers. {Via Slashdot}

Intel meets its match in IBM


In this article by Brooke Crothers, the news is out that IBM has announced it new high performance power7 chip technology.By the time Intel had introduced its latest processor for servers, the Itanium 9300, on Monday, IBM had already stolen Intel's thunder with its new Power7 chip technology.According to reports, the Power7 is impressive. It has eight cores, while Intel's Itanium 9300 (PDF) has four. And each of the Power7's cores is capable of four threads, or tasks, compared to Itanium's two per core.Although both companies are touting dozens of other features--for example, better thread performance and improved scaling of workloads--IBM is taking a lead in marquee features for the lucrative high-end server market.

Tilera Releases 64-Way Chip Dev Tools


Tilera has released a Linux-based development kit for their 64-core system on a chip.

The Tile64 is based on a proprietary VLIW (very long instruction word) architecture, on which a MIPS-like RISC architecture is implemented in microcode. A hypervisor enables each core to run its own instance of Linux, or alternatively the whole chip can run Tilera's 64-way SMP (symmetrical multiprocessing) Linux implementation. An 'iMesh' switching interconnect, developed by Tilera's founder, MIT professor and serial entrepreneur Dr. Anant Agarwal, is said to eliminate the centralized bus intersection that limited scalability in previous multicore designs

Intel's 6-core Dunnington CPU coming this year, Nehalem gets official


Quad-core shmod-core Intel, we need 6 cores or more to keep our uh, web browsers snappy. While you're at it, how about tossing in some Simultaneous Multithreading (SMT) so that each core can process two threads at a time -- 16 simultaneous threads per 8-core processor or 32 for dual-processor, 8-core rigs. If that sounds good then you're in luck; Intel just went official with its near-term architecture plans which include the 2008 launch of a 6-core Dunnington-class server CPU platform based on Intel's 45-nm Penryn "tick" architecture. On deck is Intel's second generation Nehalem "tock" architecture with SMT and scalable from 2- to 8-cores. We're talking "dramatic" performance and energy improvements, according to Intel, from a microarchitecture bent on delivering an 8 MB level-3 cache, DDR3-800 memory support, 25.6GB per second Quickpath interconnects (so long Front Side Bus!), an integrated memory controller and optional integrated graphics to high-end servers and eventually laptops. Hear that AMD? Tick, tock goes the clock.

Intel's 6-core Xeon and Nehalem CPU info leaked



Intel's had its new processor plans slipped out to the public thanks to Sun, according to DailyTech. Details on the 6-core (!) Xeon Dunnington, as well as the kinda-sorta hush-hush Nehalem were apparently leaked out onto Sun's public web server over the weekend, including plans for the new Xeons to overtake the company's Tigerton CPU line. The Dunnington processors will have a 16MB L3 cache shared by all six cores, and will be pin-compatible with the Tigertons, thus making integration with your Clarksboro chipset slightly less painful... by being possible. The Nehalem also got the spy treatment, with news that it will not only replace the Penryn line in Q4 '08, but will also be the first time in 18 years that Intel includes on-die memory controllers. If this sort of thing is important to you (and we think it may be) hit the read link and get all the juicy details.


Note: The Dunnington processor would be the first fully designed processor core out of Intel's India Design Center