Flash memories can be electrically erased and it is not necessary to erase the whole memory array in order to store new data in part of it. Flash memory, EPROM and EEPROM devices all use the same basic floating gate mechanism to store data, but they use different techniques for reading and writing data.
In each case, the basic memory cell consists of a single MOS transistor (MOSFET) with two gates:
• control gate connected to the read/write control circuitry
• floating gate located between the control gate and the channel of the MOSFET(the part of the MOSFET through which electrons flow between the so-called
Source and Drain terminals).
In a standard MOSFET, a single Gate terminal controls the electrical resistance of the channel: electrical voltage applied to the gate controls how much current can flow between the Source and Drain. The MOSFETs used in non-volatile memories include a second gate that is completely surrounded by an insulating layer of silicon dioxide, i.e., it is electrically isolated from the rest of the circuitry. Because the floating gate is physically very close to the MOSFET channel, even a small electric charge has an easily detectable effect on the electrical behavior of the transistor. By applying appropriate signals to the control gate and measuring the change in transistor behavior, it is possible to determine whether there is an electrical charge on the floating gate. Because the floating gate is electrically isolated from the rest of the transistor, special techniques are required to move electrons to and from the floating gate.
One method is to fill the MOSFET channel with high-energy electrons by making a relatively high current pass between the drain and the source of the MOSFET. Some of these "hot" electrons have sufficient energy to cross the potential barrier between the channels and reach the floating gate. When the high current in the channel is removed, these electrons remain trapped in the floating gate. This is the method used to program the memory cells in EPROM and Flash memories. This technique, known as Channel Hot Electron (CHE) injection, can be used to load an electrical charge onto the floating gate, but does not provide a way to discharge it. EPROM technology achieves this by flooding the entire memory array with ultra-violet light; the high-energy light rays penetrate the chip structure and impart enough energy to the trapped electrons to allow them to escape from the floating gate.
The second method of moving a charge to a floating gate is the quantum mechanical effect known as tunneling. In this method electrons are removed from the floating gate by applying a voltage that is large enough to cause electrons to 'tunnel' across the insulating oxide layer to the source between the MOSFET control gate and the source or the drain. The number of electrons that can tunnel across an insulating layer in a given time depends on the thickness of the layer and the value of the applied voltage. To meet realistic voltage levels and erase-time constraints, the insulating layer must be very thin, typically 7nm (70 Angstroms).
EEPROM memories use tunneling to charge and discharge the floating gate according to the polarity of the applied tunneling voltage. A Flash memory can therefore be considered to be a memory device that is programmed like an EPROM and erased like an EEPROM, although there is much more to Flash technology than simply grafting the EEPROM erase mechanism onto EPROM technology.
The most important difference between EPROM and the other two processes lies in the thickness of the oxide layer that separates the floating gate from the source. In an EPROM, this is typically 20-25nm, but this is far too thick to allow tunneling to take place at an acceptable rate with a practical voltage level. For Flash memory, tunnel oxide thickness of around 10nm is required, and the quality of this oxide layer has a dramatic effect on the performance and reliability of the device. This is one of the reasons that relatively few semiconductor manufacturers have mastered Flash technology and even fewer have been able to reliably combine Flash technology and mainstream CMOS processes to build products such as microcontrollers with embedded Flash memory.
In the next post on this series, we will look at NAND, NOR, Parallel & Serial Flashes!