Showing posts with label Power. Show all posts
Showing posts with label Power. Show all posts

Lava XOLO X900 - AnandTech Review


Reader's in India, did you have a chance to try out this phone? would you buy/recommend it?

Fast, Easy, and Flexible Power for System Designers


Systems designers are having a difficult time developing power subsystems that supply all of their system's power needs due to varied and changing power requirements. A new type of power subsystem—the field-programmable power subsystem or FPPS—squarely addresses this issue by providing a flexible approach that costs no more than conventional switching power subsystems. This white paper discusses the advantages and benefits of field-programmable power subsystems and discusses the many ways they reduce system-design risks.

The Top 10 power management 'How To' design articles of 2008


EETimes has published an article on the Top 10 Power Management articles of 2008. {Follow Here}

TI reveals details of 45-nm process


Rumors had been rampant for the past 3 months or so that TI had stopped development on the 45 nm node and moved on to 40nm attributing to lower power advantages and poor performance scaling till this article was published at EETimes.

"The first 45-nanometer chip to be designed by Texas Instruments, and fabricated by a foundry, uses new processing technology never before revealed by TI. The design details of the 45-nanometer process used to lower power by 63 percent and increase performance by 55 percent, compared with its 65-nanometer process, will be revealed Tuesday (Feb. 5) by TI at the International Solid-State Circuits Conference here."

Read on.. (Broken link, corrected now)

Interview Question


Due to a miscommunication during design, you thought your circuit was supposed to have a supply voltage of 2.1 volts (threshold voltage is 0.7 volts) and a 25 ns cycle time, and you designed it to meet those specifications. Now your boss tells you you were supposed to have a 20 ns cycle time. To avoid redesigning the whole circuit, a co-worker suggests increasing the voltage of the circuit to decrease the delay to 20 ns. The same co-worker suggests picking some arbitrary number like 3.5 volts.
  1. Determine the new cycle time of your circuit with a 3.5 volt input voltage.
  2. Your boss is worried about the additional power consumption - calculate the increase in power consumption of your circuit at 3.5 volts, assuming activity factor and capacitance remain the same and neglecting short circuit and leakage power.
  3. To satisfy your boss, calculate the minimum voltage you would increase the supply voltage to, in order to allow your circuit to run at 20 ns. You may leave your answer in non-simplified numeric terms, but not in the form of an equation to solve.

Power Analysis and Power-Aware Design - Part 1


Importance of Power and Energy:
  1. Laptops, PDA, cell-phones, etc —obvious!
  2. For microprocessors in personal computers, every watt above 40W adds $1 to manufacturing cost.
  3. Approx 25% of operating expense of server farm goes to energy bills.
  4. Sandia Labs had to build a special sub-station when they took delivery of Teraflops massively parallel supercomputer (over 9000 Pentium Pros)
  5. High-speed microprocessors today can run so hot that they will damage themselves—Athlon reliability problems, Pentium 4 processor thermal throttling
  6. Future power viruses: cell phone viruses cause cell phone to run in full power mode
Most people talk about "power" reduction, but sometimes they mean "power" and sometimes "energy."
  1. Power minimization is usually about heat removal.
  2. Energy minimization is usually about battery life or energy costs.
Power Equations:
Power
= Switching Power+Shortcircuit Power+Leakage Power
Dynamic power = Switching Power+Shortcircuit Power
Static Power = Leakage Power
  1. Dynamic Power dependent upon clock speed
  2. Switching Power useful —charges/discharges transistors
  3. Short Circuit Power not useful —both N and P transistors are on
  4. Static Power independent of clock speed
  5. Leakage Power not useful —leaks around transistor
Dynamic power is proportional to how often signals change their value (switching)
  • Roughly 20% of signals switch during a clock cycle.
  • Need to take glitches into account when calculating activity factor. Glitches increase the activity factor.
  • Equations for dynamic power contain clock speed and activity factor.
Some power reduction techniques:
  • Analog
    • Parameters to work with:
      • capacitance for example, Silicon on Insulator (SOI)
      • resistance for example, copper wires
      • voltage low-voltage circuits
    • Techniques:
      • dual-VDD Two different supply voltages: high voltage for performance-critical portions of design, low voltage for remainder of circuit. Alternatively, can vary voltage over time: high voltage when running performance-critical software and low voltage when running software that is less sensitive to performance.
      • dual-Vt Two different threshold voltages: transistors with low threshold voltage for performance-critical portions of design (can switch more quickly, but more leakage power), transistors with high threshold voltage for remainder of circuit (switches more slowly, but reduces leakage power).
      • exotic circuits Special flops, latches, and combinational circuitry that run at a high frequency while minimizing power
      • adiabatic circuits Special circuitry that consumes power on 0 - 1 transitions, but not 1 - 0 transitions. These sacrifice performance for reduced power.
      • clock trees Up to 30% of total power can be consumed in clock generation and clock tree
  • Digital
    • Parameters to work with:
      • capacitance (number of gates)
      • activity factor
      • clock frequency
    • Techniques:
      • multiple clocks Put a high speed clock in performance-critical parts of design and a low speed clock for remainder of circuit
      • clock gating Turn off clock to portions of a chip when it's not being used
      • data encoding Gray coding vs one-hot vs fully encoded vs ...
      • glitch reduction Adjust circuit delays or add redundant circuitry to reduce or eliminate glitches.
      • asynchronous circuits Get rid of clocks altogether....