Showing posts with label ANSYS. Show all posts
Showing posts with label ANSYS. Show all posts

Best known modelling practices for gigabit serial design - Live Webcast


This presentation will go over some of the common issues encountered when setting up performing circuit simulation of high speed serial designs. Topics will include s-parameter passivity and causality, frequency sampling and bandwidth and how they relate to simulation accuracy, model concatenation, and correlation between the time and frequency domains.

This webcast is Hosted by EDN and Sponsored by ANSYS.

Register Now - Click Here

Presenter:
Daniel Dvorscak,
Senior Application Engineer,ANSYS, Inc.

Date: March 25, 2011
Time: 3:00 PM ET / 12:00 PM PT