This presentation will go over some of the common issues encountered when setting up performing circuit simulation of high speed serial designs. Topics will include s-parameter passivity and causality, frequency sampling and bandwidth and how they relate to simulation accuracy, model concatenation, and correlation between the time and frequency domains.
This webcast is Hosted by EDN and Sponsored by ANSYS.
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Presenter:
Daniel Dvorscak,
Senior Application Engineer,ANSYS, Inc.
Date: March 25, 2011
Time: 3:00 PM ET / 12:00 PM PT
Best known modelling practices for gigabit serial design - Live Webcast
Written by
Wednesday, March 23, 2011
1
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