Best known modelling practices for gigabit serial design - Live Webcast

Murugavel
Written byMurugavel
Wednesday, March 23, 2011
1
This presentation will go over some of the common issues encountered when setting up performing circuit simulation of high speed serial designs. Topics will include s-parameter passivity and causality, frequency sampling and bandwidth and how they relate to simulation accuracy, model concatenation, and correlation between the time and frequency domains.

This webcast is Hosted by EDN and Sponsored by ANSYS.

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Presenter:
Daniel Dvorscak,
Senior Application Engineer,ANSYS, Inc.

Date: March 25, 2011
Time: 3:00 PM ET / 12:00 PM PT
Tags:
Murugavel

Murugavel

is a pioneering figure in the Global Semiconductor Blogging scene since 2004. A 24+ year Semicon Industry veteran, he has held various leadership positions at large product companies. He is currently the Product Director at an Automotive Semiconductor maker. Murugavel earned his Master's degree in Electrical Engineering from Texas A&M University and his specialization was in Digital Signal Processing, and VLSI architectures for Digital Communications. He is very enthusiastic about AI, Automotive, Telecom, Industrial IoT, Smart Cities and other Future Technologies. This Blog has been his long time calling/passion and hobby where he writes about Technology.

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