Showing posts with label scripts. Show all posts
Showing posts with label scripts. Show all posts

TCL for EDA - A repository Free TCL/TK tools, scripts for EDA...


http://www.tclforeda.org/
The TCL for EDA project is an open-source repository of TCL/TK tools, applications, scripts and methodological articles. The TCL for EDA project targets different stages of chip design: from Verification to Project Management and up to Synthesis, Static Timing Analysis and Design-for-Test.

Some of their offerings:

Tools:
  • Netedit - Verilog netlist editor/viewer
  • Netman - Verilog netlist manager/viewer
  • Pman - Project manager (allows navigation, viewing and editing of verilog files)
  • TCL-PLI - TCL pli library
Scripts:
  • Verilog Structural Integration Methodology and Scripts - Sounds interesting..
  • Lots of DC, Timing, DFT and verifications scripts!

A very interesting site indeed!