Soft Macro Vs Hard Macro?

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Last updated: 26th August 2023
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In this blog post, we will compare and contrast two types of macros that are commonly used in ASIC design: soft macro and hard macro. We will also discuss the advantages and disadvantages of each type, and how to choose the best one for your design goals.

What are Macros?
Macros are reusable blocks of logic that can be integrated into a larger ASIC design. They can be either predefined or custom-made, and they can perform various functions such as arithmetic operations, memory access, encryption, etc. Macros can help reduce the design complexity, improve the performance, and lower the cost of an ASIC. Soft macro and Hard macro are categorized as IP's while being optimized for power, area and performance. When buying IP an evaluation study is usually made to weigh advantages and disadvantages of one type of macro over the other like hardware compatibility issues like the different I/O standards within the design, and compatibility to reuse methodology followed by design houses. 

Soft Macros?
Soft macros is a subunit of a chip and are high-level abstractions defined at the RTL or gate level, which are not tied to a specific technology or process. They can be synthesized and placed by standard EDA tools, making them flexible and portable. Soft macros are used in SOC implementations and are more flexible than hard macros in terms of reconfigurability. However, they have the disadvantage of being unpredictable in terms of timing, area, performance, or power. Soft macros also carry greater IP protection risks because RTL source code is more portable and less easily protected than either a netlist or physical layout data. Soft macros are editable and can contain standard cells, hard macros, or other soft macros. To create a soft macro, you would need to write the RTL code for the desired functionality using a hardware description language such as Verilog or VHDL. Once the RTL code is written and verified, it can be synthesized using standard EDA tools to generate a gate-level netlist. This netlist can then be placed and routed to generate the final layout of the soft macro.

Hard Macro?
Hard macros are blocks that are generated using a full custom design methodology and imported into the physical design database as a GDS2 file. They are targeted for specific IC manufacturing technology and are block-level designs optimized for power, area, or timing, and are silicon tested2. Hard macros are defined at a low level of abstraction, such as layout or transistor level, and are specific to a certain technology or process. They have fixed physical dimensions and characteristics, and are pre-designed and pre-verified3. Hard macros can be directly inserted into an ASIC design as black boxes, providing fast and reliable performance with predictable quality. Unlike soft macros, which allow manipulation of the RTL, hard macros only allow access to their pins during physical design.

Soft Macro vs Hard Macro: Pros and Cons

Both soft macros and hard macros have their own advantages and disadvantages, depending on the design requirements and constraints. Here are some of the main factors to consider when choosing between them:

Design time: 
    Soft macros require more design time than hard macros, as they need to be synthesized, placed, routed, and verified for each ASIC project. 
    Hard macros can save design time, as they are already designed and verified by the macro vendor or library provider.

Design flexibility: 
    Soft macros offer more design flexibility than hard macros, as they can be customized and optimized for different design parameters and objectives. 
    Hard macros have less design flexibility, as they have fixed functionality and parameters that cannot be changed.

    Soft macros may have lower performance than hard macros, as they may suffer from synthesis inefficiencies, placement difficulties, or routing congestion.
    Hard macros usually have better performance than soft macros, as they are optimized for a specific technology and process. They can achieve higher speed, lower power consumption, and smaller area than soft macros. 

    Soft macros usually have lower cost than hard macros, as they do not require any upfront investment or licensing fees from the macro vendor or library provider. They can also reduce the overall ASIC cost by enabling higher integration density and lower power consumption. 
    Hard macros may have higher cost than soft macros, as they may require upfront investment or licensing fees from the macro vendor or library provider. They may also increase the overall ASIC cost by consuming more silicon area and power.

How to choose the best macro type for your ASIC design?

There is no definitive answer to which macro type is better for your ASIC design, as it depends on various factors such as design complexity, performance requirements, budget constraints, time-to-market pressure, etc. However, here are some general guidelines that may help you make an informed decision:

Use soft macros if you need high design flexibility, low cost, or portability across different technologies or processes.
Use hard macros if you need high performance, reliability, or predictability of your design.
Use a mix of soft macros and hard macros if you need to balance the trade-offs between flexibility and performance, or if you need to leverage the best features of both types of macros.

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