If you consider the transistor level of a module, active low means the capacitor in the output terminal gets charged or discharged based on low to high and high to low transition respectively.
When it goes from high to low it depends on the pull down resistor that pulls it down and it is relatively easy for the output capacitance to discharge rather than charging. hence people prefer using active low signals.
When it goes from high to low it depends on the pull down resistor that pulls it down and it is relatively easy for the output capacitance to discharge rather than charging. hence people prefer using active low signals.
Very helpful.
ReplyDeleteThanks a lot
Hi,
ReplyDeleteIt is true that the discharge time is less for a transistor capacitor.
But will it not increase the static power dessipation (Iddq Dessipation), since the line is maintained high for longer time.
I have an assumption that Logic-1 is represented by +ve voltage & Logic-0 is represented by 0(GND) voltage.
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