Glitch-Free Frequency Shifting

Download this white paper from Silicon Labs to learn how to simplify your timing design using glitch-free frequency shifting. This solution addresses low-power design challenges and the complexity of generating a wide range of frequencies in consumer electronics applications including audio, video, computing or any application that requires multiple frequencies.

Driving Flexibility into Automotive Electronics Design

With the dramatic increase in development costs for state-of-the-art process technologies, such as next-generation automotive electronic systems, specialization of traditional microcontrollers no longer makes business sense. This white paper discusses a process to develop an exact microcontroller for a specific application by implementing it into an Altera Cyclone IV FPGA for prototyping and volume production. Verification, software development, and field testing can be done immediately after design or even in parallel.

SuperSpeed Your SoCs with USB 3.0 IP

Since the introduction of the original USB standard in 1996, the USB interface has become one of the most successful connectivity standards. In today's highly connected world, USB connections are found in the computing, consumer, mobile, industrial and automotive segments. With the trend of increasing data storage requirements driven by applications, such as high-definition video, combined with the desire to move this data quickly between host, storage, and portable devices, it was only a matter of time before there was a need to make this well-known standard even faster. This heralds the third-generation of this ubiquitous standard—the arrival of SuperSpeed USB 3.0. This white paper provides a comparison between USB 3.0 and USB 2.0, highlighting the new capabilities and advancements that have been made with this next-generation technology.

A Cost Effective Way to Design Next Generation Communications Infrastructure Equipment

This white paper introduces a new category of programmable logic devices, the Tabula ABAX family based on Spacetime architecture, and shows how such devices are well suited for the design and solution requirements for next generation communications infrastructure equipment.

How System-Level Trade-Offs Drive Data Converter Decisions

For both analog-to"digital converters (ADC) and digital-to"analog converters (DAC), system-level specifications have a strong influence on several aspects of the converter's design, including conversion rate, resolution, power dissipation and silicon area. With a special emphasis on broadband wireless applications, this white paper reviews the design trade-offs ranging from the converter's sampling rate to the choice of single- or multiple-chip system partitioning. Understanding these choices enables chip architects and designers to optimize their systems in accordance with their particular constraints and the characteristics of the data converters.

Show Me the Next-Generation HDMI

The first part of this white paper explores the basic concepts behind HDMI, the markets it serves and its leadership role in multimedia interfaces. This is followed by a tutorial on the new capabilities of HDMI 1.4 and their role in providing a richer, more straightforward user experience. Next, we'll explore a series of user case scenarios that illustrate how the HEAC feature can simplify cabling requirements between digital home multimedia devices. The last portion of this paper discusses the architectural considerations and technical details involved with incorporating the Ethernet and Sony/Philips Digital Interconnect Format (S/PDIF) standards into the HDMI system-on-chips (SoCs) to support the HEAC feature.

A Lifecycle Approach to Quality Management

Success in ever more competitive worldwide marketplaces demands continually smarter products and systems, which in turn lead to compounding complexity. Furthermore, while advanced functionality is an important competitive differentiator, quality has become part of the "price of entry" into the marketplace. Quality can no longer be considered an attribute that can be added into systems at the end of the development lifecycle. Controlling risks and costs needs to be a guiding principle that drives virtually all stages of the lifecycle, starting at the concept stage; building during analysis, design, deployment and acceptance; and continuing through service until end-of-life retirement. As a result, the management of quality must consider all key systems engineering disciplines, including requirements engineering, systems design and testing, and change and configuration management. This white paper examines the changing role of quality assurance and looks at approaches to effectively extend application lifecycle management (ALM) to include quality management and how this improves project outcomes.

Fast, Easy, and Flexible Power for System Designers

Systems designers are having a difficult time developing power subsystems that supply all of their system's power needs due to varied and changing power requirements. A new type of power subsystem—the field-programmable power subsystem or FPPS—squarely addresses this issue by providing a flexible approach that costs no more than conventional switching power subsystems. This white paper discusses the advantages and benefits of field-programmable power subsystems and discusses the many ways they reduce system-design risks.

Improve Project Success with Better Information

Are we on target? Are we within budget? Are my projects contributing effectively to my operational objectives? How well are these operational objectives helping to satisfy our business goals? Can we easily demonstrate compliance to customer requirements or industry standards? Are we ready to ship? This white paper discusses the difficulties organizations face as they gather critical information, and explores the use of automation to increase the efficiency and effectiveness of reporting and measurement. It also introduces IBM Rational solutions that can help organizations automate reporting and measurement to improve project, program and organizational management and decision makers' abilities to influence positive outcomes.

Phase-locked loops (PLLs) Demystified

Over the past decade, Phase-Locked Loops (PLLs) have become an integral part of the modern ASIC design. PLLs provide the clocks that sequence the operation of the various blocks on an ASIC chip as well as synthesize their communications. There are various types of PLLs targeting specific applications. Read this white paper to learn more about the types of PLLs and how they work in certain technologies.