Discussion based Interview Question

 Your company, EarGuard Inc., is working on the q-pod, a new music player. The chief verification engineer has just reported that a bug has been discovered in the qDub module of the q-pod. The verification team has a hypothesis for what triggers the bug. Your task is to valuate whether the verification team's hypothesis is correct.

INSTRUCTIONS:
1. Facts about the qDub module:
Number of input bits: 56
Number of output bits: 32
Number of combinational gates: 500
Number of flip-flops: 100
Latency 5 clock cycles
Clock speed: 200 MHz

(a) All output signals are combinational
(b) The input is three unsigned numbers, each of which is between 0 and 65535 inclusive
(c) The output is two unsigned numbers, each of which is between 0 and 65535 inclusive
(d) If the bug occurs, both output signals are assigned 0. If the qDub was correct, it would never be the case that both output signals were 0 at the same time.
(e) The verification team hypothesizes that the bug occurs if-and-only-if in a single clock cycle, all three of the input numbers are greater than 19 and less than 25.

2. Test setup:
(a) EarGuard Inc. has begun to manufacture qDub chips for evaluation purposes. You are given 100 qDub chips, each of which has a computer and a test rig (printed circuit board and cables) to connect the qDub chip to the computer so that the computer can generate input test data and analyze the results.
(b) The test rigs can send and receive data with the qDub at the normal clock speed of the qDub (200MHz).
(c) All the qDub modules are the same design and therefore have exactly the same buggy behaviour.
(d) You must complete your evaluation within 2 months, so that the Earsplit managers can decide whether to ship the q-pod with the buggy qDub or delay production.

Briefly describe your procedure to evaluate whether the verification team's hypothesis is correct.

Difficulty: Medium
9-ms0