STA Interview Question

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Suppose we are building circuits using only the following three components:
  • inverter: tcd = 0.5ns, tpd = 1.0ns, tr = tf = 0.7ns
  • 2-input NAND: tcd = 0.5ns, tpd = 2.0ns, tr = tf = 1.2ns
  • 2-input NOR: tcd = 0.5ns, tpd = 2.0ns, tr = tf = 1.2ns
Consider the following circuit constructed from an inverter and four 2-input NOR gates:






  1. What is tPD for this circuit?
  2. What is tCD for this circuit?
  3. What is tPD of the fastest equivalent circuit (i.e., one that implements the same function) built using only the three components listed above?
Solution:
  1. tPD for the circuit is the maximum cumulative propagation delay considering all paths from any input to any output. In this circuit, the longest path involves three 2-input NAND gates with a cummulative tPD = 6ns.
  2. tCD for the circuit is the minimum cumulative contamination delay considering all paths from any input to any output. In this circuit, the shortest path involves two 2-input NAND gates with a cumulative tCD = 1ns.

  3. The most straightforward way to determine the functionality of a circuit is to build a truth table:
    A  B  | OUT
    ======|=====
    0  0  |  1
    0  1  |  0
    1  0  |  1
    1  1  |  0
    
    from which we can see that OUT = not B. We can implement this with a single inverter that has a tPD = 1ns.

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  1. AnonymousJune 20, 2008

    why are the rise and fall times then given???

    ReplyDelete
  2. AnonymousJuly 15, 2008

    true, tr/tf are not needed, but i believe that filtering the relevant information out of the question is also an important task of the designer/interviewee.

    ReplyDelete
  3. What is contamination delay (tCD) ?

    ReplyDelete
  4. http://en.wikipedia.org/wiki/Contamination_delay

    ReplyDelete
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