Power Supplies
Dynamic power supply
Power gating adds enabling signals to a power supply network; dynamic power supply management adjusts supply voltage ac…
Interview Questions
Clock tree theory
Constructing a zero-skew clock tree can be formulated as constructing a path-length balanced tree (assuming path delay …
Symmetrical Clock Routing
Statistical clock tree design
Clock skew is a function of process variation, i.e., delay from the clock source to a leave of the clock tree is a stat…
Physical Design
Clock driver input alignment
Modern clock networks include several drivers in which delays are affected by the timing of their input signal transiti…
Re-Timing
Re-timing tackles long combinational logic paths
Re-timing reduces longest combinational logic paths by relocating some of the flip-flops, both logically and physically…
Technology Mapping
Transistor level technology remapping
This is a process of combining several cells to form new library cells, and to optimize a transistor level netlist. Thi…
Sizing
Transistor sizing / multi-Vt design
This task usually starts with a placed and routed design, then generating a transistor level netlist for it and further…
Statistical Timing Analysis
Process variation extraction
Process variation extraction needs to be design specific, and based on random field simulation, as mechanical engineeri…
Interviews
Interview with Anuj Valmiki, VLSI Design Manager
Anuj, who's worked on video chips for nearly 20 years, is a great role model for all practicing engineers. He'…
Interview Questions
Backend physical design Interview Questions
Updated 28 Aug 2023: I have listed below a set of common interview questions asked mainly in interviews related to phys…
Technical Leadership
Insulting leadership practices
Here are five of the most insulting leadership practices , the ones that virtually guarantee a business will end up wi…
Top 10
RTL synthesis and other backend Interview Questions (with answers)
Q1: How would you speed up an ASIC design project by parallel computing? Which design stages can be distributed for pa…
Semicoductor
Quantum chips will replace silicon chips anyways
Physicists at McGill University in the US now have a system where they can measure the energy involved in adding elect…
University
University of Washington: Fall Lecture Series
Each fall, the UW College of Engineering partners with the UW Alumni Association to present a series of free lectures …
Skills
Ways to improve your Interview Skills
With so much useful advise and talented career experts out there with often differing opinions, you will most likely en…
Technical
Challenges of a Fabless Semiconductor Startup Company in Consumer Electronics
Consumer electronics remains one of the fastest growing business markets in today's world and provides many opportu…
University
Researchers Create Logic Circuits From DNA
Researchers at Duke University recently used DNA to craft tiny chips used in computers and electronic circuits . By mi…
Test
Wilder Technologies Launches Line of Test Adaptor Products for Test & Measurement Companies
Vancouver, WA -- Wilder Technologies has released a new family of test adaptor products for the test & measurement …
Wireless
Cambridge Wireless is Unlocking New Semiconductor Opportunities in Connectivity 20th May 2010, Cambridge, UK
Cambridge Wireless has announced the second meeting of the popular semiconductor Special Interest Group meeting taking …
Wireless
Access Wireless Sensor Networks from portable computing devices
Libelium, a technology leader in distributed wireless networks, announced a new Bluetooth module for its Waspmote wirel…
VLSI
VSIDE - VSDSP Integrated Development Environment
VLSI Solution has announced VSIDE - the Integrated Development Environment for VSDSP Processor Family. VSIDE is an inte…
VHDL
VLSI/ASIC/VHDL Interview Questions
1. **For a combinational process in VHDL, the sensitivity list should contain all of the signals that are read in the p…
Information
Information
In a couple of weeks time the current blog @ http://digitalelectronics.blogspot.com will be hosted on a dedicated doma…
Press Release
Press Release: Baolab creates nanoscale MEMS inside the CMOS wafer
Baolab Microsystems has announced a new technology to construct nanoscale MEMS (Micro Electro Mechanical Systems) withi…
Grid
Grid Computing Vs Cluster Computing
A cluster computer is a set of CPU nodes that are used to solve any problem over a network. The way in which this coope…
Verification
Acceleration And Emulation – Why HW/SW Integration Needs Both
Acceleration, Emulation, and FPGA prototypes are most talked about these days and each has a distinctive role to play.…
Nokia
Nokia N8 is official: Priced €370 ($494)
Nokia's N8 is now official would see a launch during April. With a packed design that includes a 12 megapixel came…
Verification
Cadence Debuts Verification Computing Platform
Cadence Design Systems, Inc. has announced a fully integrated high-performance verification computing platform, called …
News
Gawker Media received no direct revenue from iPhone 4G scoop
In response to the iPhone 4g post i ran yesterday i got quite a few comments and i want to highlight one of them specif…
iPad
Google Acquires iPad Chip Maker Startup Agnilux
" Google has purchased Agnilux , a secretive chip house made up of engineers who architected the heart of the iP…
Technology Review
Achieving Fiber-Optic Speeds over Copper Lines
A 100-year-old networking trick could boost transmissions over telephone infrastructure. Alcatel-Lucent has developed …
TechOnline
PCI Express-based MicroTCA Design Options
PCI Express-based MicroTCA platforms are generating more and more interest. This paper describes how small and cost-e…
White Papers
Driving Flexibility into Automotive Electronics Design
With the dramatic increase in development costs for state-of-the-art process technologies, such as next-generation aut…
White Papers
SuperSpeed Your SoCs with USB 3.0 IP
Since the introduction of the original USB standard in 1996, the USB interface has become one of the most successful c…
HP
Advertisement: HP Coupons & Coupon Codes
HP Home is the official HP website for personal computers, printing and imaging, servers and storage products for cons…
Virtualization
Improving I/O Virtualization Performance with PCI Express
Virtualization technology has been used in high-end servers for quite some time. The evolution of virtualization has b…
White Papers
A Cost Effective Way to Design Next Generation Communications Infrastructure Equipment
This white paper introduces a new category of programmable logic devices, the Tabula ABAX family based on Spacetime a…
TechOnline
Stay in control of schedules and costs when requirements change
Organizations need to know how changing requirements in a complex system will affect development. An effective change …
Testing
At-Speed and Advanced Fault Models for Achieving High Quality Test
With the increasing clock speeds and the decreasing feature sizes found in today's nanometer designs, at-speed tes…
Verification
SDRAM Memory Systems: Architecture Overview and Design Verification
DRAM (Dynamic Random Access Memory) is attractive to designers because it provides a broad range of performance and is …
TechOnline
Protect Your FPGA Against Piracy: Cost-Effective Authentication Scheme Protects IP in SRAM-Based FPGA Designs
This application note describes FPGAs (field-programmable gate arrays) and how they can hold the key functions and th…
TechOnline
Restrictive Design Rules and Their Impact on 22nm Design and Physical Verification
Process variability is posing considerable challenge to the capability of lithography and manufacturing techniques, an…
VHDL
A Step-By-Step Methodical Approach for Efficient Mixed-Language IP Integration
This article provides a comprehensive methodology that highlights the best practices for mixed-language design integra…
VLSI Conference
List of VLSI and related Conferences
The following is a list of conferences specific to the VLSI industry. It was earlier part of a widget on the sidebar bu…