Interview question - Clock and Voltage

Increasing clock speed without increasing power...
The following are given:
  • You need to increase the clock speed of a chip by 10%
  • You must not increase its dynamic power consumption
  • The only design parameter you can change is supply voltage
  • Assume that short-circuiting current is negligible
How much do you need to decrease the supply voltage by to achieve this goal?

What problems will you encounter if you continue to decrease the supply voltage?


In each low power approach described below identify which components of a typical power equation are being minimized or maximized.
  1. Designers scaled down their ASIC.
  2. The Transistors were made larger.
  3. All inputs to functional units are registered.
  4. Gray coding of signals is used for address signals.

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