Silicon production testing is the testing every manufactured chip goes through before it is shipped, to prove that this particular device works and meets its data sheet limits. It runs on automatic test equipment (ATE) in high volume, first on the wafer (wafer sort) and again after packaging (final test), and its job is to catch manufacturing defects, not design bugs. The goal is simple: ship only good parts, at the lowest test cost per part, with the fewest failures in the field.
Production testing is performed on silicon chips and integrated circuits during the manufacturing process to verify that they meet the required performance and functionality specifications. Its purpose is to make sure that only high-quality, functional devices go into finished products, and to minimise the risk of defects in the field.
Key takeaways
- Production test screens each manufactured part for defects. Design verification and characterisation, done earlier, prove the design itself.
- It normally happens at two insertions: wafer sort (probe test) on the bare die, and final test on the packaged part. Many products add burn-in or system-level test.
- The main test types are structural (scan, ATPG, memory BIST), functional, parametric (DC and AC electrical limits) and stress screens.
- Full reliability qualification (HTOL, temperature cycling and similar) is done on samples, not on every unit. Production uses short stress screens such as burn-in instead.
- Test time is money. Engineers trade test coverage against seconds per part, and quality is tracked in defective parts per million (DPPM).
Where production test sits in the flow
A chip passes through several distinct test activities between tape-out and the customer. Only the last group is production test.
| Activity | When | Question it answers | Who sees every part |
|---|---|---|---|
| Design verification | Before tape-out | Is the design logically correct? | No silicon yet |
| Silicon bring-up and characterisation | First silicon | Does the design meet spec across voltage, temperature and process corners? | No, a few hundred lab samples |
| Reliability qualification | Before volume release | Will the product survive its lifetime? | No, statistical sample lots |
| Production test (wafer sort, final test) | Every wafer, every unit, for the life of the product | Is this particular part free of manufacturing defects? | Yes, 100 percent of units |
The test insertions
Wafer sort (probe test)
After fabrication, a probe card touches the bond pads or bumps of each die while the wafer sits on a prober. The tester runs a reduced programme: continuity, leakage, scan and memory tests, and key parametrics. Failing die are marked in a wafer map so they are not packaged. Catching a bad die here is cheap, because nothing has been spent on packaging it yet. For chiplets and multi-die packages the bar is higher, since one bad die can scrap a whole expensive assembly; this is why the industry talks about "known good die".
Final test (package test)
Packaged parts go to a handler that feeds them into a socket on the tester, often at hot and cold temperatures. Final test repeats the critical checks, adds tests that need the package (full-speed I/O, analogue performance, thermal behaviour) and sorts parts into speed or power bins. It is covered in more detail in What is Final (End-of-Line) Silicon Testing?
Burn-in and system-level test
Some products, especially automotive and server parts, are run at raised voltage and temperature for a period to make weak parts fail early (infant mortality) before they reach the customer. Complex SoCs increasingly add system-level test (SLT), where the part boots real software on a board, because some defects only show up under realistic workloads.
What is tested
Production testing typically combines functional, parametric and stress testing.
- Functional testing. Each device runs a series of tests to confirm it performs its intended functions correctly. In modern digital chips most of this is structural test: scan chains with ATPG patterns check stuck-at and transition faults, and memory built-in self-test (MBIST) checks the SRAMs. Structural tests reach high fault coverage in far less time than functional patterns.
- Parametric testing. Each device is tested for key electrical parameters such as supply current, leakage, input and output voltage levels, drive strength and timing. Pin capacitance is usually characterised in the lab rather than measured on every part. IDDQ (quiescent supply current) testing is a classic parametric screen for bridging defects.
- Stress and reliability screening. The original version of this post described "reliability testing" on each device under temperature, voltage and stress conditions. To be precise: full reliability tests that simulate years of operation (for example high-temperature operating life, HTOL, under JEDEC JESD47) are run on sample lots during qualification. What production applies to every part is shorter screening: tests at hot and cold temperature, voltage stress, and burn-in where the product requires it.
A worked example: why test cost and coverage matter
The numbers below are illustrative, not from a real product.
| Item | Value |
|---|---|
| Tester cost rate | USD 0.03 per second (multi-site, all costs included) |
| Wafer sort time per die | 4 s |
| Final test time per unit | 6 s |
| Test cost per good unit (ignoring yield loss) | 10 s x 0.03 = USD 0.30 |
On a USD 3 microcontroller, that is ten percent of the selling price, so every second removed from the programme matters. Now consider quality. A widely used approximation (the Williams and Brown model) links shipped defect level to yield Y and fault coverage T: defect level is roughly 1 minus Y to the power of (1 minus T). With a yield of 90 percent and 99 percent fault coverage, the defect level is about 1 minus 0.90.01, or roughly 0.1 percent, which is about 1,050 DPPM. Raising coverage to 99.9 percent cuts this to about 105 DPPM. Automotive customers typically expect defect levels in the single-digit DPPM range or better, which is why automotive test programmes push coverage hard and add extra screens.
Why production testing matters
Production testing is an important step in manufacturing silicon chips and integrated circuits because it ensures that only high-quality, functional devices go into finished products. By identifying and removing defective devices, it reduces the overall cost of manufacturing (a part rejected at wafer sort costs far less than a failed board or a recalled car), improves the reliability and performance of the final product, and reduces warranty claims and returns from customers. Test data also feeds back to the fab and design teams: yield maps and failure bins point to process problems and marginal circuits.
Common mistakes
- Treating test as an afterthought. If scan, MBIST and test access are not designed in (design for test, DFT), production test becomes slow, expensive or impossible to make thorough.
- Confusing qualification with screening. Passing qualification on samples says the design and process are reliable; it does not remove a defective individual unit. Only per-unit screening does that.
- Guard-banding too tightly or too loosely. Limits set too tight throw away good parts (yield loss); too loose and marginal parts escape to customers.
- Ignoring test time growth. Pattern counts grow with each generation. Compression, multi-site testing and adaptive test keep cost in check.
FAQ
Is production testing the same as verification?
No. Verification proves the design is correct before silicon exists. Production testing assumes the design is correct and checks each manufactured part for defects.
What equipment is used?
Automatic test equipment (testers from vendors such as Advantest and Teradyne), wafer probers with probe cards for wafer sort, and handlers with sockets and temperature control for final test.
Does every chip get tested?
Yes, every unit sees wafer sort and final test. Reliability qualification and detailed characterisation are done on samples.
What is a test bin?
A category the tester assigns to each part, such as pass at full speed, pass at lower speed, or fail for a specific reason. Bins drive speed grading and yield analysis.
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