- Determine the burst size (B): The burst size represents the amount of data written at once.
- Calculate the FIFO depth: Use the following formula to calculate the FIFO depth (D) based on the burst size and the clock frequencies (F1 and F2):$\ufffd=\ufffd-\frac{\ufffd\times \ufffd2}{\ufffd1\times \ufffd}$where I is the number of idle cycles between two read cycles

- Fx = frequency of the writing side.
- Fy = frequency of the reading side.
- B = data burst.

Burst duration = B/Fx

Data Rec'd, Rx= (B/Fx) * Fy, assuming simultaneous read for the duration.

Extra storage during FULL condition, Backlog = B-Rx = B(Fx-Fy)/Fx

To accommodate latency or response time in the receiver, T, we need additional T * Fx locations.

Receiver also needs time to read all this backlog, so the idle time between bursts must be long enough. So this minimum time is called mop-up time = backlog/Fy = B * (Fx-Fy)/(Fx.Fy)

Note: For bursts of data which are written for partial amount time for a given number of cycles and read that are happening continously "or" are also read for a partial amount of time for a given number of cycles, the calculation has to account for the next burst.

# FIFO Depth Calculator

Enter the following parameters and click on the Calculate button to get the minimum FIFO depth.

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**Scenario 1:**The frequency of block X is greater than the frequency of block Y, and there are no ideal clock cycles on both sender and receiver sides. Fx > Fy.

- The total time required to write the data one at a time will be 1/Fx = 1/80MHz = 12.5 nsec. and for all signals to write it takes B*12.5nsec = 120 * 12.5 nsec = 1500 nsec.
- The total time required to read the data one at a time will be 1/Fy = 1/50MHz = 20 nsec. It means system B will read a data item from the burst at 20nsec. So it can read 1500 nsec / 20 nsec = 75 number of data in the duration of 1500 nsec.
- Since only 75 data items are read in 1500 nsec, the remaining 120 – 75 = 45 number of data must be held by the FIFO.

**Scenario 2:**The frequency of block X is greater than the frequency of block Y, and there is one clock cycle delay between two successive writes and reads. Fx > Fy.

**Scenario 3:**The frequency of block X is greater than the frequency of block Y, and there is one ideal clock cycle between two successive writes, and there are three ideal clock cycles between two successive reads. Fx > Fy.

- Since the one idle clock cycle is given between two successive writes, it means that system X is waiting for one clock cycle after writing one data item. So overall, it takes two clock cycles to send on data. Therefore we can calculate the total time required to write one data as 2 * (1/Fx) = 2 * (1/80MHz) = 25 nsec. then to write a burst of data it will take 120 * 25 nsec = 3000 nsec duration.
- Since three idle clock cycles are given between two successive reads, it means that the system Y is waiting for three clock cycles after reading one data item. So overall, it takes four clock cycles to read one data item. Therefore we can calculate the total time required to read one data as 4 * (1/Fy) = 4 * (1/50MHz) = 80ns. So in the duration of 3000 nsec, it reads 3000 nsec / 80 nsec = 37.5 ~ 37 number of data items only.
- Since only 37 data items are read in the duration of 3000 nsec, the remaining 120 – 37 = 83 data items must be held by the FIFO.

**Scenario 4:**The frequency of block X is lesser than the frequency of block Y, and there are no ideal clock cycles on both sender and receiver sides. Fx < Fy.

**Scenario 5:**The frequency of block X is lesser than the frequency of block Y, and there is one ideal clock cycle between two successive writes, and there are three ideal clock cycles between two successive reads. Fx < Fy.

- Write Time for one data item = 2 * (1/Fx) = 2 * (1/30) = 66.667 nsec, Write Time for burst data = 120 * 66.667 nsec = 8000 nsec.
- Read Time for one data item = 4 * (1/Fy) = 4 * (1/50) = 80 nsec. So in the duration of 8000 nsec, it will read 8000nsec/80nsec = 100 data items.
- The remaining number of data items 120 – 100 = 20 needs to be held by the FIFO.

**Scenario 6:**The frequency of block X is equaled to the frequency of block Y, and there are no ideal clock cycles on both sender and receiver sides. Fx = Fy.

**Scenario 7:**The frequency of block X is equaled to the frequency of block Y, and there is one ideal clock cycle between two successive writes, and there are three ideal clock cycles between two successive reads. Fx = Fy.

- Write time per data = 2*(1/50MHz) = 40 nsec. and Write time for a burst of data 120 * 40 nsec = 4800 nsec.
- Read time per data = 4*(1/50MHz) = 80nsec. So for the duration of 4800nsec, it will read 4800nsec/80nsec = 60 number of data items.
- The remaining 120-60=60 data items are to be held by the FIFO.

**Scenario 8:**A typical example of problem 1

- In the worst-Scenario let us assume the write operation completes in just 160 clock cycles(since burst size is 160, the first 80 data at 80 clock cycles and the next 80 data at the next 80 clock cycles).
- The read time for 8 data is 10 clock cycles, and the read time for 160 clock cycles will be 160*8/10 = 128 clock cycles.
- So the remaining data 160 – 128 = 32 must be held at FIFO.

**Scenario 9:**A typical example of problem 2

- Let us assume the clock frequency of system Y is 100MHz. then according to the statement, the frequency of system X must be 100MHz/4 = 25MHz.
- Write time per data = 1/25MHz = 40nsec. Write time for a burst of data 100*40nsec = 4000nsec.
- The duty cycle of en_y is 25% so that it will read only for 1000nsec.
- The remaining data of 3000nsec duration must be held by the FIFO.

Please explain more clearly sir

ReplyDeleteif i take f1=100 and f2=20

then if burst is 100

according to formula i get 4 ...

Please explain clearly

If i take f1=20 f2=100

then how to claculate f1-f2 is -ve...

Hi Anonymous:

ReplyDelete4 is wrong, 8 is correct.

If your reading side is faster than writing, then you get an underflow condition.... In this condition, why do you need to calculate fifo depth?

Please can anyone explain this logic with an example...........it would be helpful to me..

ReplyDelete