GLS
Gate Level Simulation, Part - II
Gate level simulation is used in the late design phase to increase the level of confidence about a design implementat…
Verilog
Verilog rules that can save your breath !
This article contains some thoughts of mine about how and engineer should write Verilog code for Synthesis, general rul…
Embedded
Embedded System Design: A Unified Hardware/Software Introduction
Some web resources, references, labs, and slides. http://esd.cs.ucr.edu/
Synthesis
Synthesis
Logic synthesis is a process by which an abstract form of desired circuit behavior, typically register transfer level (…
Verilog Tutorial
Comprehensive Verilog Tutorials - Introduction
The history of the Verilog HDL goes back to the 1980s, when Gateway Design Automation developed Verilog-XL logic simula…
Verilog Tutorial
Comprehensive Verilog Tutorials - Welcome
This is an Introductory & Comprehensive Verilog Course, which covers.. Modeling Designs for Digital Simulation. Mod…
Sponsors
Sponsors
Be a sponsor & Support this Blog Some of our Proud Sponsors: VLSIChipDesign Checkout how much a Text-Link is worth …
Updates
Invitation to be a contributor on this blog!
We are happy to invite you as a contributor to this blog in digital electronics. Of course, you can choose to be anonym…
Updates
Added Features!
After much awaited delay due to developments on the blogger in beta, i m happy to announce that i have successfully con…
GLS
Gate level simulation - Introduction
Gate level simulation (GLS) is a technique for verifying the functionality and timing of a digital circuit after it has…
Low Power
RTL considerations and Functional verification of low power designs
This article is about RTL in a Multi-Voltage environment and it's implication on verification. In the earlier …
Low Power
Todays Low Power Techniques
Lets take a look at the various low power techniques in use today. I would classify them into 2 categories Structu…
Low Power
Design Elements of Low Power Design
Special cells are required for implementing a Multi-Voltage design. Level Shifter Isolation Cell Enable Level Shifter…
Low Power
Infrastructure Needs for Multi-Voltage Designs
Before we start looking at implementing a Multi-Voltage design there are certain questions that need to be answered to …
Low Power
Multi Voltage magic
In the last few weeks i have been quite busy with a lot of research on low power design. There are so many tutorial…
Low Power
Vt Cells and Spacing Requirements
Multi-Vt placement/spacing concerns I was just thinking about most common concerns faced today in addressing leakage p…
Simulation
Event simulation versus cycle simulation
By popular demand: Event simulation allows the design to contain simple timing information - the delay needed for a sig…
Updates
Updates
Last 2 weeks has witnessed a sudden surge in visitors and so i decided to continue my experiments for some more time wi…