Five forces will shape technology through 2026: AI staying mainly in the cloud, the move to new transistor structures, HBM4 leading the memory recovery, advanced packaging and photonics tackling heat and bandwidth, and the US and China rivalry splitting the technology supply chain. None of them is a new gadget or app. They come from the places where compute, manufacturing and geopolitics meet. This is an opinion piece written in November 2025.
Looking ahead to 2026, I see five forces shaping the industry, from AI and chip design to supply chains and energy use. Engineers, managers and investors will all feel them.
Key takeaways
- Large AI models will be trained and mostly served in the cloud; the contest shifts to efficiency per inference and energy per computation.
- Gate-all-around transistors are now in production, with CFETs and 2D materials on the roadmap, and materials science is becoming as strategic as lithography.
- HBM4 doubles the interface width of HBM3E and is central to the memory market's recovery.
- Chiplets, 3D stacking and silicon photonics are the main tools against rising power density and bandwidth limits.
- Export controls and industrial policy are pushing the world towards parallel technology ecosystems.
The five forces at a glance
| Force | What is changing | Who feels it most |
|---|---|---|
| 1. AI stays in the cloud | Custom accelerators, faster interconnects, efficiency per inference | Hyperscalers, data-centre chip and power suppliers |
| 2. New transistors | FinFET to gate-all-around, then CFET and 2D materials | Foundries, EDA and materials suppliers, designers |
| 3. HBM4 | Wider, faster memory stacks beside the accelerator | Memory makers, packaging houses, AI chip designers |
| 4. Packaging and photonics | Chiplets, 3D stacking, optical links near the chip | System architects, thermal and packaging engineers |
| 5. US and China rivalry | Export controls, local supply chains, materials restrictions | Every company with a global supply chain |
1. Most AI will stay in the cloud
Edge AI gets a lot of attention, but large models still live in the cloud. Training and serving models with hundreds of billions of parameters needs more compute and memory than any edge device can offer today.
A rough, illustrative sum shows why. A model with 400 billion parameters stored at 8 bits per weight needs about 400 GB just for its weights, before the memory used during inference. A high-end phone has around 12 to 16 GB of memory in total. Edge devices run small or compressed models; the largest ones need racks of accelerators.
For now the cloud remains the centre of AI work. Hyperscalers will keep investing in custom accelerators, faster interconnects and more efficient data centres. The next point of competition is efficiency per inference and energy per computation, not just peak performance.
Hybrid designs will improve too, with better scheduling between cloud and edge: quick responses on the device, training and heavy lifting in the data centre.
2. New transistors will change the foundry market
The industry is moving past FinFETs. With the move to gate-all-around (GAA) FETs, and CFETs and 2D materials on the roadmap, the change is not only about speed. It changes how chips are built.
In a FinFET, the gate wraps three sides of a vertical fin. In a GAA transistor, the gate surrounds a stack of horizontal nanosheets on all four sides, which gives better control of leakage and lets designers tune drive current by changing sheet width. Samsung introduced GAA at its 3 nm node in 2022, and TSMC's N2 and Intel's 18A, which uses Intel's RibbonFET GAA design with backside power delivery, were reported to be entering volume production around late 2025. A complementary FET (CFET) goes further by stacking the n-type and p-type transistors on top of each other, and 2D channel materials are being researched for beyond that.
That brings both disruption and opportunity. Established foundries may see new entrants that specialise in particular architectures, and materials science is becoming as strategic as lithography.
The race is no longer only about the smallest node. It is about who can bring performance, packaging and energy efficiency together in one system.
3. HBM4 will lead the memory recovery
After several years of downturns, the memory market is recovering, and High Bandwidth Memory (HBM4) is at the heart of it.
AI and high-performance computing have made data movement as important as raw compute. HBM4 brings a large jump in bandwidth, which eases the memory bottleneck in AI training, gaming and simulation.
Worked example: where the HBM4 bandwidth comes from
JEDEC published the HBM4 standard in April 2025. Its main change is a 2,048-bit interface per stack, twice the 1,024 bits of HBM3 and HBM3E. Bandwidth per stack is interface width times data rate per pin:
- HBM3E at about 9.6 Gb/s per pin: 1,024 x 9.6 / 8, about 1.2 TB/s per stack.
- HBM4 at 8 Gb/s per pin: 2,048 x 8 / 8, about 2 TB/s per stack.
An accelerator with eight HBM4 stacks would therefore have around 16 TB/s of memory bandwidth (illustrative; actual products vary in stack count and pin speed). The wider interface also means many more connections through the base die and interposer, which ties HBM4 closely to advanced packaging.
In practice, moving data efficiently now matters as much as processing it.
4. Advanced packaging and photonics will improve efficiency
Heat is one of the most underrated problems in computing. Power density keeps rising, and conventional cooling and integration are close to their limits. Leading AI accelerators now draw around a kilowatt or more each, and racks built from them are moving to liquid cooling.
Advanced packaging, including chiplets, 3D stacking and heterogeneous integration, offers a way forward. Combined with silicon photonics, which carries data as light rather than electrical signals, it can ease thermal limits and raise the bandwidth between components. Co-packaged optics, where the optical engine sits in the same package as a switch or processor, shortens the electrical path and cuts the energy needed per bit; NVIDIA and Broadcom have both announced co-packaged optics switch products.
The result will be systems designed for energy efficiency and scale from the start, rather than fixed afterwards.
5. US and China rivalry will reshape the tech order
No view of the future is complete without geopolitics. Competition between the United States and China has gone well beyond trade. It now decides who can access advanced chips, AI tools and critical materials.
The pattern is visible in a few steps: US export controls on advanced computing chips and chipmaking equipment from October 2022, tightened in 2023 and 2024; China's export licensing for gallium and germanium from August 2023; and large subsidy programmes such as the US CHIPS and Science Act of 2022 and the European Chips Act of 2023.
The result is a split into parallel technology ecosystems. Countries and companies are reviewing their supply chains for resilience and control over critical technology.
Over the next few years this will reshape alliances, investment and research priorities. Regions may specialise faster, and the global picture will become more complex.
What to watch through 2026
- Cost and energy per AI inference reported by cloud providers and chip makers.
- Yield and volume ramps of 2 nm class GAA processes at TSMC, Samsung and Intel.
- HBM4 qualification on the next generation of AI accelerators, and HBM supply versus demand.
- Advanced packaging capacity, such as CoWoS-class lines, and the first volume co-packaged optics deployments.
- Any new rounds of export controls or materials restrictions.
The bigger picture
These trends are linked. AI is pushing compute, compute is pushing physics, and geopolitics is testing how far companies and countries can work together.
The companies that do well in 2026 will not simply be the fastest. They will be the most adaptable: able to change direction, plan ahead and absorb shocks.
That work is already under way, one transistor, one model and one decision at a time.
FAQ
Will edge AI replace cloud AI?
Not for the largest models. Edge devices will run smaller and compressed models for fast, private responses, while training and heavy inference stay in data centres.
What is a gate-all-around transistor?
A transistor whose gate surrounds stacked horizontal channels (nanosheets) on every side, giving better control of current and leakage than a FinFET at very small sizes.
Why does HBM4 matter for AI?
AI accelerators are often limited by how fast they can move data from memory. HBM4's wider interface roughly doubles bandwidth per stack compared with HBM3E at similar pin speeds.
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