Digital Logic Design - Interview Essentials!
Hello Readers, Due to the recent spate of Layoffs , a high amount of panic and interview preparation frenzy has seeped…
Hello Readers, Due to the recent spate of Layoffs , a high amount of panic and interview preparation frenzy has seeped…
The best part about this survey is that you get to see what users are looking for, whats bothering them that they would…
Announced Worldwide Layoffs As of 30th January 2009 Infineon - 3000 Qimonda - 3000 (Bankrupt: 23 Jan 09) Renesas -…
Intel will continue to invest in products and technologies even though it sees that a U.S.financial meltdown is likely …
Engineers at Battelle have come up with a way to send data through the air at 10 Gigabits per second using point-to-po…
Based on the content and articles in this blog do you really think that this blog should be categorized under VLSI or A…
This is how you can get a free link to your blog. If you are not already a member of the ASIC/VLSI/Digital Electronics …
According to IC insights , the maket forecast looks grim for 2008 total worldwide IC market growth, noting shrinking de…
module xvga(clk,hcount,vcount,hsync,vsync); input clk; // 64.8 Mhz output [10:0] hcount; output [9:0] vcount; …
Coaching Excellence in IC Design Teams: Why Can't we get Rid of that Thorn in our Process? Commenting on this artic…
Infineon India - Bangalore is planning for a Fresher's Event in September 08 & thereby invites CVs of friends w…
One day you are strolling the hallways in search of inspiration, when you bump into a person from the marketing departm…
Your task is to do the power analysis for a circuit that should send out a one-clock-cycle pulse once every 16 clock cy…
Your manager has given you the task of implementing the following pseudo code in an FPGA: if is_odd(a + d) { p = (a +…
Updated on 25th Jan 2022!! The Euclidean algorithm is a method for finding the greatest common divisor (GCD) of two or …
By Popular Demand! module sqrt (clk,data,start,answer,done); input clk,start; input [7:0] data; output [3:0] answer;…
Did you know this basic gotcha of verilog :-) ? You can use the "*" operator to multiply two numbers: wire […
"In The Feynman Lectures on Computation , Richard Feynman poses an interesting little puzzle involving the synchr…
This is a famous interview question just that it has got a makeover! Question: Construct a "divisible-by-3"…
Hello All: In fact it has been a long time since we had posted any sort of interview questions or puzzles and so here …
Hello & Best wishes! Due to overwhelming responses to this Blog and successful placement of 500+ Freshers and exper…
Did you know that you can access the complete conference CD including sessions and papers. Please visit http://confe…
Two Complimentary Online Tutorials Available Now… IEEE Communications Society is pleased to offer two free online tut…
---------- Forwarded message ---------- From: < jcooley@zeroskew.com > Date: Wed, Jun 18, 2008 at 6:02 PM Subjec…
[Via John's Semi-Blog ] Without too much fanfare, Cadence has introduced a tool to help automate ECO creation: Cade…