LTE QoS Concepts & Architecture - Free Video Tutorials

Topics Covered: 1.What is LTE QoS? 2.QoS Tags 3.Bearer 4.QoS Management 5.PCRF Lecturered by: Yair Shapira

Architecture and partitioning for low power

A good working definition of architecture ( in the context of IP design, atleast) is the partitioning and interface design of the IP. In supporting various low power strategies, power gating presents the most significant architectural challenge in the architecture of IP.

To support power gating, we need to:

1. Decide when and how the IP will be powered down and powered up.
2. Decide which blocks will be power gated and which blocks will be always on.
3. Design a power controller that controls the power up and power down sequence.
4. Determine which signals need to be isolated during power down.
5. Develop an initial strategy for clocks reset and the power control signals.
   

Coarse and Fine grained architectures

Coarse-grained architectures consist of fairly large logic blocks, often containing two or more look-up tables and two or more flip-flops. In a majority of these architectures, a four-input look-up table (think of it as a 16x1 ROM) implements the actual logic. The larger logic blocks usually corresponds to improved performance.

Fine-grained circuits, consist of the basic cell being simple (OR, AND,and NOT).