
How to get a free link to your ASIC or VLSI Blog?
This is how you can get a free link to your blog. If you are not already a member of the ASIC/VLSI/Digital Electronics …
This is how you can get a free link to your blog. If you are not already a member of the ASIC/VLSI/Digital Electronics …
According to IC insights , the maket forecast looks grim for 2008 total worldwide IC market growth, noting shrinking de…
module xvga(clk,hcount,vcount,hsync,vsync); input clk; // 64.8 Mhz output [10:0] hcount; output [9:0] vcount; …
Coaching Excellence in IC Design Teams: Why Can't we get Rid of that Thorn in our Process? Commenting on this artic…
Infineon India - Bangalore is planning for a Fresher's Event in September 08 & thereby invites CVs of friends w…
One day you are strolling the hallways in search of inspiration, when you bump into a person from the marketing departm…
Your task is to do the power analysis for a circuit that should send out a one-clock-cycle pulse once every 16 clock cy…
Your manager has given you the task of implementing the following pseudo code in an FPGA: if is_odd(a + d) { p = (a +…
Updated on 25th Jan 2022!! The Euclidean algorithm is a method for finding the greatest common divisor (GCD) of two or …
By Popular Demand! module sqrt (clk,data,start,answer,done); input clk,start; input [7:0] data; output [3:0] answer;…
Did you know this basic gotcha of verilog :-) ? You can use the "*" operator to multiply two numbers: wire […
"In The Feynman Lectures on Computation , Richard Feynman poses an interesting little puzzle involving the synchr…
This is a famous interview question just that it has got a makeover! Question: Construct a "divisible-by-3"…
Hello All: In fact it has been a long time since we had posted any sort of interview questions or puzzles and so here …
Hello & Best wishes! Due to overwhelming responses to this Blog and successful placement of 500+ Freshers and exper…