Displaying posts in the categoryGPUs and Accelerators
GPUs and Accelerators articles
News
NVIDIA's shares fell about 17% on 27 January 2025 because DeepSeek, a Chinese AI lab, showed that a frontier-class reasoning model could be built with far less GPU compute than investors had assumed. If top models need fewer chips, the reasoning went, demand for NVIDIA's most expensive accelerators might grow more slowly. This post was written on 28 January 2025, the day after that sell-off, and is kept as a dated commentary, with a shor…
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Murugavel Ganesan
January 28, 2025
Technology
Yes, the number of independent video streams a GPU or display subsystem can drive is a real design limit in car IVI (In-Vehicle Infotainment) systems. A modern cockpit may need to run an instrument cluster, a central screen, a head-up display and rear-seat screens at the same time, while also taking in camera feeds, and it must do this inside automotive temperature, power and safety limits. The challenges and constraints differ from consumer or …
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Murugavel Ganesan
September 17, 2024
Video
A Tensor Processing Unit (TPU) is Google's own chip for neural network maths. It began in 2015 as an inference accelerator for Google's data centres, built around a large systolic array of 8-bit multiply-accumulate units, and has since grown into a family of training and inference chips that Google connects in pods of thousands. The short video below, from Google Cloud Tech, walks through that history and the hardware; this post adds the…
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Murugavel Ganesan
January 04, 2024
Video
At the New York Times DealBook Summit on 29 November 2023, Nvidia chief executive Jensen Huang told Andrew Ross Sorkin that AI capable of passing tests that reflect basic human intelligence could arrive within about five years, depending on how artificial general intelligence is defined. He also said the United States was at least a decade away from full independence from China in its chip supply chain, and described Nvidia's culture as one …
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Murugavel Ganesan
December 15, 2023
Tutorials
To benchmark an FPGA accelerator fairly, measure three things on the same realistic workload: performance (throughput, latency and speedup over a baseline), power and energy (measured at the board or wall, not only estimated), and accuracy (error against a trusted reference). Report them together, because an FPGA design can trade one against the others, for example by using lower-precision arithmetic to gain speed and save power at some cost i…
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Murugavel Ganesan
December 14, 2023
Tutorials
An FPGA accelerator is a board or device that uses a field-programmable gate array to run a specific task faster or more efficiently than a general-purpose processor. Instead of executing instructions, the FPGA is configured into a custom circuit for that one algorithm, with its own parallel datapaths and pipelines. Most FPGA accelerators sit beside a host CPU on a PCIe card and take over the heavy part of a workload, such as packet processing, …
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Murugavel Ganesan
December 13, 2023
Verilog
FPGA based cryptographic acceleration means moving encryption, decryption, hashing and signature work from a general-purpose processor into custom logic on a field-programmable gate array. The FPGA wins when the work is regular and highly parallel, such as AES on a 100 Gbit/s link or SHA-256 over a storage stream, because it can pipeline the algorithm and process a new block every clock cycle. It also stays reprogrammable, so the design can foll…
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Murugavel Ganesan
December 12, 2023
Tutorials
FPGA based video processing acceleration means building the video pipeline, such as scaling, filtering, codec stages or neural network inference, directly in programmable hardware instead of running it as software on a CPU or GPU. Because pixels can be processed as they stream in, an FPGA can deliver high, deterministic throughput with latency measured in video lines rather than frames, often at lower power than a general-purpose processor for t…
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Murugavel Ganesan
December 12, 2023
GPUs and Accelerators
FPGA based customised acceleration means moving the hot loop of an application out of software and into a hardware circuit built for that one job on a field-programmable gate array. Because the circuit is shaped around the algorithm, with its own parallel processing elements, on-chip memories and number formats, it can beat a general-purpose processor on throughput, latency and energy per operation for the right workloads. The trade-off is engin…
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Murugavel Ganesan
December 12, 2023
