SoC Design
Paying for Coherency: Snoop-Filter Sizing and the AMBA Choice for SoC Architects
Hardware coherency is usually presented as a yes or no question about the whole fabric. In practice each master on a SoC gets its own answer, because a CPU cluster, a DMA engine and a neural accelerator share data in very different ways. This post is a decision guide for architects. It puts rough numbers on what hardware coherency costs in storage, traffic and latency, sets out when IO or software coherency is enough, and shows how AMBA CHI, A…
