Displaying posts in the categoryEvents and Webinars
Events and Webinars articles
Video
Thanks for supporting us. Please consider adding your comments, Subscribe and Share. Pagehits: 0 Why does Chip War author Chris Miller think India has an edge in the semiconductor industry? In this December 2023 conversation with Soroco founder Rohan Murty at the Global AI Conclave, hosted by Moneycontrol and CNBC-TV18, Miller discusses where India stands as chips become a matter of national strategy. The case usually made for India rests…
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Murugavel Ganesan
January 01, 2024
Video
On 24 October 2023, TSMC founder Morris Chang spoke at MIT about his career and how the semiconductor industry evolved, from his years at Texas Instruments to founding TSMC in 1987 and creating the dedicated foundry model. His main argument was that manufacturing strength depends on people and experience built up in one place, which he summed up as "learning is local." The full talk is embedded below. As part of the Manufacturing@MIT…
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Murugavel Ganesan
December 21, 2023
Video
Intel's AI Everywhere event, held in New York on 14 December 2023, was where the company launched its Core Ultra processors for AI PCs and its 5th Gen Xeon processors for servers, and gave a first look at the Gaudi 3 AI accelerator due in 2024. This post carried the event replay. The headline message was that AI would run across every class of Intel hardware, from the laptop to the data centre and the network edge. Event replay as embedde…
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Murugavel Ganesan
December 20, 2023
Video
At the New York Times DealBook Summit on 29 November 2023, Nvidia chief executive Jensen Huang told Andrew Ross Sorkin that AI capable of passing tests that reflect basic human intelligence could arrive within about five years, depending on how artificial general intelligence is defined. He also said the United States was at least a decade away from full independence from China in its chip supply chain, and described Nvidia's culture as one …
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Murugavel Ganesan
December 15, 2023
Sponsored
Intel held its "AI Everywhere" launch event on 14 December 2023, live from Nasdaq in New York, with CEO Pat Gelsinger and other Intel leaders. The event launched 5th Gen Intel Xeon processors for the data centre and Intel Core Ultra processors for laptops, both pitched at running AI workloads across the data centre, the cloud and the edge. This post was first published on 4 November 2023 as an invitation to the event, based on Intel…
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Murugavel Ganesan
November 04, 2023
Simulation
This presentation will go over some of the common issues encountered when setting up performing circuit simulation of high speed serial designs. Topics will include s-parameter passivity and causality, frequency sampling and bandwidth and how they relate to simulation accuracy, model concatenation, and correlation between the time and frequency domains. This webcast is Hosted by EDN and Sponsored by ANSYS. Register Now - Click Here Present…
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Murugavel Ganesan
March 23, 2011
RF and Wireless
If you live in Bangalore, India this might be of interest to you. Stoke Technical Seminar Series focus on 3G Mobile Data Offload, Emergence of LTE Technology, Integrated WiFi and Seamless Mobility, Stoke SSX Product Family Evolution. A Must Attend For: * Telecom Service Providers * Cellular Service Providers - GSM & CDMA * VAS Technology & Platform Companies * Content Aggregators * Content Owners * Ente…
Processors
Last week i was invited to a Tech Talk organized by Oracle India (Sun Microsystems BU). The title of the talk was "Tech Talk - The Bleeding Edge, Evade your challenges– A dive into critical issues affecting High-end bleeding edge Semiconductors designs and the development engineers face off". The speaker was Mr. Sridhar Vajapey, VP, Hardware Development (Sun Microsystems BU), Oracle Corporation Inc. The talk was highly informative co…
India Semiconductors
The conference schedule and the registration links can be found here . With a program that is focused on helping you deal effectively with every day design challenges, SNUG is committed to making the best possible use of your time and delivering practical information you can take away and apply to your current project as well as future designs. CLICK HERE to register in advance. If you cannot attend the full program, please register for the ses…
Semiconductor Industry
The main VLSI conferences are ISSCC, the VLSI Symposium and CICC for circuit design, DAC, DATE, ICCAD and ASP-DAC for design automation, IEDM for devices, ITC and ETS for test, and ISLPED for low-power design. Around them sit dozens of regional and specialist meetings on SoCs, FPGAs, RF, asynchronous logic and hardware security. This list was first published in April 2010 (it used to be a sidebar widget and was moved into a post so it could be r…
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Murugavel Ganesan
April 14, 2010
SoC Design
Cadence Design Systems and Virage Logic would like to invite you to an interactive Lunch and Learn session that is designed to provide the latest information about MIPI standards, how to design-in an optimized MIPI solution, and how to develop an effective verification strategy for MIPI System-on-Chip (SoC) integration success! Seating is limited - Register Now Wednesday, April 21, 2010 This is a Free Educational Event …
Verification
Featured Tutorial: Step-By-Step Guide to Advanced Verification Tutorial!, DVcon Exhibits and Product Demos.., DVCon Paper Presentations... etc.. more @ this link
Verification
DVClub is a very interesting organization. With chapters in Austin, Bangalore, Boston, Dallas, Research Triangle Park, San Diego, and Silicon Valley , the club’s stated purpose is “to have fun while helping build the verification community through quarterly educational and networking events.” IC engineers can join for free, and events are free. Costs are picked up by sponsors, including Cadence.
India Semiconductors
VLSID 2010, Asia’s premier technical conference on VLSI design, EDA and embedded systems will be held at NIMHANS Convention Center, Bangalore, India from January 3 - 7, 2010. The conference agenda is now live, and can be found on their website ! VLSID 2010 features an exciting lineup of seventy technical papers, eight distinguished keynote speakers, and nine invited embedded tutorials/hot topic presentations on the three days of the conference…
Process Technology
Hot papers from this year's VLSI Technology Symposium include three nonvolatile memory advancements: Toshiba' BiCS Flash, Samsung's vertical-stacked transistor structures and Hitachi's PCRAM. Two papers on advanced logic processes include: Intel's" High-k/Metal Gate Stacks" and IBM's "32nm SOI CMOS with Highk/ Metal Gate."
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The Editor's Desk
June 15, 2009
Events and Webinars
In this SpyGlass(R) webinar, Atrenta experts will take you through the highlights of the new release and cover the following topics, including overviews of: * Latest GuideWare™ methodology improvements for better productivity * New Atrenta Console™ interface for improved ease of use (demo included) * CDC Setup Manager (demo included) * Multi-mode timing coverage report, including why it's valuable * New at-speed test analysis * CPF and UPF s…
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The Editor's Desk
May 06, 2009
India Semiconductors
Conference Location: The Leela Palace Kempinski, Bangalore The Grand Ballroom Airport Road Bangalore, India 560 008 Conference Date: July 9-10, 2009 Mar 2-Apr 3, 2009, Call for Papers Apr 20, 2009, Preliminary Acceptance Notification May 11, 2009, Final Paper Due May 15, 2009, Final Acceptance Notification and Presentation Spots Awarded Jun 15, 2009, Draft Slides Due Jun 16-26, 2009, Dry Run Practice at Synopsys Jun 29, 2009, Final …
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Murugavel Ganesan
April 17, 2009
Static Timing Analysis
Webinar:Accelerating Time-To-SI-Closure Date:Tuesday, March 31, 2009 Time: 11 amPT / 2 pm ET Duration: 60Minutes Register now @: http://TIG.cmptechnetwork.com/cgi-bin4/DM/y/eA0KLkvJ0A0HEhi0Ez Liveattendees who also submit the feedback form will be eligible to win a FREE 8GBiPod Touch (value approx. $250). Accelerating Time-to-SI –Closure: Unmanagedtiming-ECOs during the final stages of design can severely impact your tapeout schedule. Join our e…
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Murugavel Ganesan
March 26, 2009
Processors
Cool Chips 2009 IEEE Symposium on Low-Power and High Speed Chips Yokohama, Japan April 15-17, 2009 COOL Chips is an International Symposium initiated in 1998 to present advancement of low-power and high-speed chips. The symposium covers leading-edge technologies in all areas of microprocessors and their applications. The COOL Chips XII is to be held in Yokohama on April 15-17, 2009, and is targeted at the architecture, design and implementation …
Verification
An in-depth technical webinar focusing on low power verification methodology. On Tuesday, March 31, 2009 5:00 pm, Pacific Daylight Time (GMT -07:00, San Francisco) Panelist(s) Info: Krishna Balachandran, Director of Low Power Verification Marketing, Srikanth Jadcherla, Group R&D Director, Janick Bergeron, Synopsys Fellow Duration: 1 hour Description: Power management and low power design bring a whole new assortment of bugs and failure me…
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Murugavel Ganesan
March 19, 2009
