VIP
The world of HVLs and VIPs
Over the last decade functional verification of ASIC systems has witnessed a paradigm shift in verification methodologi…
Showing posts from December, 2009
Verification Plan
Verification Plan
An effective verification plan encompasses a detailed description of the complete hierachical verification methodology …
Size. Transistor Size
Single-atom transistor discovered
Researchers from Helsinki University of Technology (Finland), University of New South Wales (Australia), and University…
Verification
Dealing with clock jitter in DDR2/DDR3 based designs
For the past couple of days i have been part of a design that interfaces a DDR/DDR2 memory. But lately after a recent p…
Soft Skills
Importance of soft skills
The semiconductor industry in general demands two special skills in every engineer. One of these skills is more trivial…