Universal Phone Charger Coming (2009)
Just a day after , the all unexpected The Universal phone charger is a reality!
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Semiconductors. Chips and Systems. Innovation.
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Just a day after , the all unexpected The Universal phone charger is a reality!
Harry Gries has announced what could be the first SaaS EDA roundtable. He had been discussing this for a while on his blog on how this new trend in IT could be leveraged for the EDA industry and to a sort of feasibilty analysis. This will be held at 2009 DVCon and below are the details. The SaaS and Cloud Computing Roundtable will be held from 6:30 - 8:00 pm on Wed Feb 25th in the Monterey/Carmel rooms at the San Jose Doubletree Hotel. This is…
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Why don't our governments force all mobile phone companies to use a single connector on their chargers, in order to eliminate the mountains of e-waste generated by switching chargers every time you switch phones. Transformer bricks with esoteric connectors are the most common form of electronic crap we see on street-vendors' blankets around the world (literally thousands and thousands of them in Mumbai's Chor Bazaar and street and bo…
Note (added 1 November 2026): this is a news report from February 2009, published on this blog at the time. It reports arrests and charges announced by US authorities in 2009. Charges are allegations, not findings of guilt, and this page does not report on what happened afterwards. The original text is kept below unchanged. A short, general section on checking a US employer and job offer through official sources has been added after it. Key t…
To meet the International Technology Roadmap for Semiconductors (ITRS) forecast that device with gate length of sub-10nm will be fabricated by 2016 advanced gate stacks with high-k dielectrics are of intensive research interests. Stringent power requirements in the chips also dictate replacement of silicon dioxide as it has already reached the direct tunneling regime. Currently, many different high-k materials have been explored to replace the s…
To get your Blog listed in our Google Custom Search Engine you "SHOULD" satisfy the following criteria! 1. Your website or blog needs to be strictly related to Electronics or Semiconductors. Any sub classifications are allowed as long as you follow fair and ethical use policies. We will have to review your policies, guidelines and disclaimer which needs to be provided to us via e-mail or as a url to your page! 2. We don't entertain…
Location: Bangalore, India Experience: 3+ Years Education: Bachelors degree in ECE or EEE Skill Set: Proficiency in C. Experience in DSP with OFDM, physical layer communications, wireless communication. Experience in xDSL technology and firmware greatly desired. Experience in xDSL testing, WT100, TR-67, use of Spirent equipment, familiarity with TCL scripts, ATE would be a plus! Exposure to G.992.3 (ADSL2) & G.992.5 (ADSL2+) standards pr…
These chip art images were either extracted through lapping techniques, magnification and/or Polaroid capturing. Typically chips have a unique "signature" or a identification number to recognize and expect to be logic, memory, gates, or a product of some kind. However, these signatures are the designer's, the engineer's and in some cases a company logo. They have left their mark in and for history. The chip collection is comple…
Please help improve the "Digital Electronics" Article on Wikipedia by contributing. Please don't simply delete the existing section or update the information without prior discussing on the talk page! We have observed that lots of unnecessary changes have happened in the last 1 yr or so. Though by definition it is "anyone can update", please don't link to your personal pages or blogs!!!!! As per wikipedia... This a…
Development of semiconductor heterostructures used in high-speed and opto-electronic systems; The Nobel Prize in Physics 2000. Zhores I. Alferov was born in Vitebsk, Belorussia, USSR, on March 15, 1930. In 1952, he graduated from the Department of Electronics of V. I. Ulyanov (Lenin) Electrotechnical Institute in Leningrad. Since 1953 he has been a staff member of the Physico-Technical Institute where he held consecutively the following positio…
Any ideas or opinions or even suggestions to teach and promote semiconductors at the high school level will be greatly appreciated in today's world? It is in this spirit that i am directing your attention to a site that is teaching 16+ years olds what semiconductors are all about.
This is the most common question being asked among engineers and rather should be asking if you are not. EDN Executive Editor Ron Wilson Explores "We see giant companies like IBM and Microsoft announce great fourth-quarter and annual results, and then follow up with a layoff announcement." We see smaller companies in the fabless world staying on track on product development, successfully sampling to key customers, and ramping revenue …
With big players joining the fray in job cuts, the semiconductor job outlook looks atrociously grim. The recent figures and estimates suggest that this recession is one that was not witnessed before and here to stay. The list below gives the more recent jobcuts and updates. Samsung, Toshiba to cut more costs ST to cut 4,500 jobs amid weak results Corning profit falls; cuts up to 4,900 jobs TI to cut jobs 12% as profit sinks 86% IBM cutting about…
Wikipedia: The Missing Manual is a popular how-to book on Wikipedia that has all the information you need to get started with editing pages on Wikipedia. Wikipedia may be the biggest group writing project ever, but the one thing you won't find in the comprehensive online encyclopedia is easy-to-follow guidance on how to contribute. Wikipedia: The Missing Manual helps you avoid beginners' blunders and gets you sounding like a pro from y…
You can Download a free copy of "The Seven Habits of Highly Effective People" audio book by going to audible.com . To avail this offer, make sure that you select "USA" as the country when creating a free audible account on the next page. The Seven Habits of Highly Effective People has sold more than 15 million copies worldwide while the audio version was the first non-fiction audio book in U.S. publishing history to sell more…
An event of VLSI Society of India ! Seminar on: Automated Design of Digital Microfluidic Lab-on-Chip (Connecting Biochemistry to Information Technology and Electronic Design Automation) Speaker: Prof. Krishnendu Chakrabarty, Dept of ECE, Duke University Date and Venue: 11 February, 2009, 11:00AM-12:00PM, G1, TI India Campus, Bangalore For Details click here!
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It is no easy task to record the achievements of individual engineers nowadays. But looking at the past achievements and trends, most of them have had graduated from schools like MIT, Stanford, IITs etc. and joined a handful of companies that offered superb training grounds and career opportunities. Checkout this article on EETimes
EETimes has published an article on the Top 10 Power Management articles of 2008. {Follow Here}
Many companies are catching on to the fact that bloggers can provide an effective way to create buzz (viral marketing) about their brands. We've seen several efforts that explicitly recognize that fact, such as TasteCasting for restaurants and YokmoK's free travel giveaways. We want to bring this notion to our blog world. Please contact us directly if you are interested. We are sure, this will be more cost effective than just buying a…
Based on Revenue numbers from iSuppli in $Bn. 1. Intel - 34 2. Samsung - 18 3. TI - 12 4. Toshiba - 11 5. ST - 10.7 6. Renesas - 8 7. Sony - 7 8. Qualcomm - 6.7 9. Hynix - 6.4 10. Infineon - 6.3
Anybody in this industry would agree that there are 3 things that are critical for its success. 1. Quick adaptation of Technology - Can impact chip cost, time to market and customer/market reputation! Even transfer of new technology from Engineering to production. 2. Being ahead of the competition - Bad marketing decisions and late changes in the design can adversely affect this motive. Smart decisions can avoid a critical delay. Definition of r…
Verilog started out as a proprietary simulator in 1984 and enjoyed considerable success due to its C like syntax. In 1990, Cadence Design Systems made the language public. It became an IEEE standard in 1995. VHDL was developed under contract to the U.S. Department of Defense. It became an IEEE standard in 1987. VHDL has its roots in Ada. For many years there was intense competition between Verilog and VHDL for mind share and market share. Both l…
I am sure you have been reading this blog and did you decide to comment? In writing your comment, you may find a need to post a reference link which may be a website or an article on the internet or just a link to your blog or website or article. Just how easy is to do that? Well, it is simple. This is the code that you need to drop into the comment box: Replace the URL with the URL of the site or article you are linking to and replace the Ti…
As memories grow larger, with more memory cells packed into an ever-shrinking die area, the cost to manufacture a die remains fairly constant, while the time it takes to apply test programs increases exponentially. It is estimated that the cost to test a memory chip runs from 50% to 70% of the total cost of the finished product. The first steps in reducing the cost of memory test is to understand what fault mechanisms are most likely to occur an…
Memory test algorithms are fixed sequences of writes and reads that expose defects in RAM cells, address decoders and sense circuits. Legacy patterns such as GALPAT and Walking 1s find many faults but take time proportional to N 2 , so production memory built-in self-test (MBIST) relies on linear-time March algorithms such as MATS+, March C- and March B. This part of the series explains the classical patterns, how to read March notation, which f…
Hello Readers: Today we are happy to announce the launch of our new open invitation based column called "I have something to explain". A kind of "open Mic". Here the readers of this blog are invited with a chance to write an article of their choice that is unique, original that is not already on this blog. What you get back? Sorry we cannot pay you monetarily but in return you will get full credit for the post, an author page…
Semiconductor memories are characterized according to the following properties: Serial or random access, Volatile or nonvolatile, Static or dynamic, Destructive or nondestructive readout. Serial access memories are those in which data are accessed in a fixed, predetermined sequence. Magnetic tape units are an example of serial access. To read a record it is necessary to read the entire tape up to the point where the desired data exists. By way o…
Memories are pervasive in digital computing. Consider, the personal computer which has a main memory, video memory, translation ROMs, shadow ROMs, scratchpad memory, hard disk, floppy disk, CDROM, and various other kinds of storage distributed throughout. In addition, the die that contains the microprocessor also contains one or more levels of cache. A typical PC is depicted in the block diagram below. It is basically a memory hierarchy connecte…
[Via ednmag] Fister, others out at Cadence Will new ideas dim the future of FPGAs? Structured ASICs and microcontrollers renew the debate Lithium-ion-battery-charging IC powered by charge-transfer, control innovations DDR3 SDRAM exposed: Inside a bleeding-edge, blazing-fast memory device Where is EDA going now? Critical clock-domain-crossing bugs CMOS winner-take-all circuits: A tutorial Cadence: The picture gets darker HDL-design challenges and…
Blogger's blogging platform is great but is not powerful enough to support discussions of any kind. We had evaluated Intense Debate's web platform but observed that it lacked the handle to tweak and collect data. Keeping these factors in mind we have decided to re-open our old Google group from the attic! So how to we plan to use this group you may ask? Its simple. We will post all questions only to this GOOGLE GROUP. This includes inte…
Hello Reader, In this New year we are happy to announce a significantly redesigned blog which gives more flexibility and control to all. Fortunately most of the features are available only when subscribed, either by RSS or by E-MAIL . Top 10 features: Summary of the articles on the main page! Expandable to full article when clicked on the Post Title or Link. Related posts links below the main article to access all the related articles and publi…
Detecting a defective unit is often only part of the job. Another important aspect of test economics that must be considered is the cost of locating and replacing defective parts. Consider again the board with 10 integrated circuits. If it is found to be defective, then it is necessary to locate the part that has failed, a time-consuming and error-prone operation. Replacing suspect components that have been soldered onto a PCB can introduce new…
However, if devices are tested, feature sizes can be reduced and more die will fit on each wafer. Even after the die are tested and defective die are discarded, the number of good die per wafer exceeds the number available at the larger feature sizes. The benefit in terms of increasing numbers of good die obtainable from each wafer far outweighs the cost of testing the die in order to identify those that are defective. Point B on the graph corr…
The table depicted shows test cost broken down into four categories some of which are one-time, non recurring costs whereas others are recurring costs. Test preparation includes costs related to development of the test programs as well as some potential costs incurred during design of the DFT features. DFT-related costs are directed toward improving access to the basic functionality of the design in order to simplify the creation of test program…
What are the factors that influence the cost of test? Quality and test costs are related, but they are not inverse of one another. As we shall see, an investment in a higher-quality test often pays dividends during the test cycle. Test related costs for ICs and PCBs include both time and resource. As pointed out in previous sections, for some products the failure to reach a market window early in the life cycle of the product can cause significa…
http://www.tclforeda.org/ The TCL for EDA project is an open-source repository of TCL/TK tools, applications, scripts and methodological articles. The TCL for EDA project targets different stages of chip design: from Verification to Project Management and up to Synthesis, Static Timing Analysis and Design-for-Test. Some of their offerings: Tools: Netedit - Verilog netlist editor/viewer Netman - Verilog netlist manager/viewer Pman - Project mana…
Transport delay passes every input change to the output after the delay, however short the pulse. Inertial delay also delays the signal, but it filters out pulses shorter than the delay (or a set reject limit), as a real gate does. Delta delay is the zero-time step a VHDL simulator uses to order events that happen at the same simulation time; Verilog orders them through its event scheduling regions instead. Key takeaways Transport delay mode…